On Tue, Mar 26, 2024 at 09:47:03AM +0800, Inochi Amaoto wrote: > The DMA IP of Sophgo CV18XX/SG200X is based on a DW AXI CORE, with > an additional channel remap register located in the top system control > area. The DMA channel is exclusive to each core. > > Add the dmamux binding for CV18XX/SG200X series SoC > > Signed-off-by: Inochi Amaoto <inochiama@xxxxxxxxxxx> > --- > .../bindings/dma/sophgo,cv1800-dmamux.yaml | 48 ++++++++++++++++ > include/dt-bindings/dma/cv1800-dma.h | 55 +++++++++++++++++++ I remember checkpatch.pl require .h have seperate patch. Frank > 2 files changed, 103 insertions(+) > create mode 100644 Documentation/devicetree/bindings/dma/sophgo,cv1800-dmamux.yaml > create mode 100644 include/dt-bindings/dma/cv1800-dma.h > > diff --git a/Documentation/devicetree/bindings/dma/sophgo,cv1800-dmamux.yaml b/Documentation/devicetree/bindings/dma/sophgo,cv1800-dmamux.yaml > new file mode 100644 > index 000000000000..d7256646ea26 > --- /dev/null > +++ b/Documentation/devicetree/bindings/dma/sophgo,cv1800-dmamux.yaml > @@ -0,0 +1,48 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/dma/sophgo,cv1800-dmamux.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Sophgo CV1800/SG200 Series DMA mux > + > +maintainers: > + - Inochi Amaoto <inochiama@xxxxxxxxxxx> > + > +allOf: > + - $ref: dma-router.yaml# > + > +properties: > + compatible: > + const: sophgo,cv1800-dmamux > + > + reg: > + items: > + - description: DMA channal remapping register > + - description: DMA channel interrupt mapping register > + Look like driver have not use it. Frank > + '#dma-cells': > + const: 2 > + description: > + The first cells is device id. The second one is the cpu id. > + > + dma-masters: > + maxItems: 1 > + > + dma-requests: > + const: 8 > + > +required: > + - '#dma-cells' > + - dma-masters > + > +additionalProperties: false > + > +examples: > + - | > + dma-router { > + compatible = "sophgo,cv1800-dmamux"; > + #dma-cells = <2>; > + dma-masters = <&dmac>; > + dma-requests = <8>; > + }; > diff --git a/include/dt-bindings/dma/cv1800-dma.h b/include/dt-bindings/dma/cv1800-dma.h > new file mode 100644 > index 000000000000..3ce9dac25259 > --- /dev/null > +++ b/include/dt-bindings/dma/cv1800-dma.h > @@ -0,0 +1,55 @@ > +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ > + > +#ifndef __DT_BINDINGS_DMA_CV1800_H__ > +#define __DT_BINDINGS_DMA_CV1800_H__ > + > +#define DMA_I2S0_RX 0 > +#define DMA_I2S0_TX 1 > +#define DMA_I2S1_RX 2 > +#define DMA_I2S1_TX 3 > +#define DMA_I2S2_RX 4 > +#define DMA_I2S2_TX 5 > +#define DMA_I2S3_RX 6 > +#define DMA_I2S3_TX 7 > +#define DMA_UART0_RX 8 > +#define DMA_UART0_TX 9 > +#define DMA_UART1_RX 10 > +#define DMA_UART1_TX 11 > +#define DMA_UART2_RX 12 > +#define DMA_UART2_TX 13 > +#define DMA_UART3_RX 14 > +#define DMA_UART3_TX 15 > +#define DMA_SPI0_RX 16 > +#define DMA_SPI0_TX 17 > +#define DMA_SPI1_RX 18 > +#define DMA_SPI1_TX 19 > +#define DMA_SPI2_RX 20 > +#define DMA_SPI2_TX 21 > +#define DMA_SPI3_RX 22 > +#define DMA_SPI3_TX 23 > +#define DMA_I2C0_RX 24 > +#define DMA_I2C0_TX 25 > +#define DMA_I2C1_RX 26 > +#define DMA_I2C1_TX 27 > +#define DMA_I2C2_RX 28 > +#define DMA_I2C2_TX 29 > +#define DMA_I2C3_RX 30 > +#define DMA_I2C3_TX 31 > +#define DMA_I2C4_RX 32 > +#define DMA_I2C4_TX 33 > +#define DMA_TDM0_RX 34 > +#define DMA_TDM0_TX 35 > +#define DMA_TDM1_RX 36 > +#define DMA_AUDSRC 37 > +#define DMA_SPI_NAND 38 > +#define DMA_SPI_NOR 39 > +#define DMA_UART4_RX 40 > +#define DMA_UART4_TX 41 > +#define DMA_SPI_NOR1 42 > + > +#define DMA_CPU_A53 0 > +#define DMA_CPU_C906_0 1 > +#define DMA_CPU_C906_1 2 > + > + > +#endif // __DT_BINDINGS_DMA_CV1800_H__ > -- > 2.44.0 >
