Re: [PATCH v3 0/9] Setting live video input format for ZynqMP DPSUB

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On 21/03/2024 21:43, Anatoliy Klymenko wrote:
> Implement live video input format setting for ZynqMP DPSUB.
> 
> ZynqMP DPSUB can operate in 2 modes: DMA-based and live.
> 
> In the live mode, DPSUB receives a live video signal from FPGA-based CRTC.
> DPSUB acts as a DRM encoder bridge in such a scenario. To properly tune
> into the incoming video signal, DPSUB should be programmed with the proper
> media bus format. This patch series addresses this task.
> 
> Patch 1/9: Set the DPSUB layer mode of operation prior to enabling the
> layer. Allows to use layer operational mode before its enablement.
> 
> Patch 2/9: Update some IP register defines.
> 
> Patch 3/9: Factor out some code into a helper function.
> 
> Patch 4/9: Announce supported input media bus formats via
> drm_bridge_funcs.atomic_get_input_bus_fmts callback.
> 
> Patch 5/9: Minimize usage of a global flag. Minor improvement.
> 
> Patch 6/9: Program DPSUB live video input format based on selected bus
> config in the new atomic bridge state.
> 
> Patch 7/9: New optional CRTC atomic helper proposal that will allow CRTC
> to participate in DRM bridge chain format negotiation and impose format
> restrictions. Incorporate this callback into the DRM bridge format
> negotiation process.
> 
> Patch 8/9: DT bindings documentation for Video Timing Controller and Test
> Pattern Generator IPs.
> 
> Patch 9/9: Reference FPGA CRTC driver based on AMD/Xilinx Test Pattern
> Generator (TPG) IP. Add driver for the AMD/Xilinx Video Timing Controller
> (VTC), which supplements TPG.

None of the last users of your API can be merged, therefore this API
should be considered as without users. We do not add API which does not
have any in-tree users.

Best regards,
Krzysztof





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