On Tue, Mar 19, 2024 at 09:39:52PM -0700, Deepak Gupta wrote: ... > I am not sure of the practicality of this heterogeneity for Zicboz and > for that matter any of the upcoming > features that'll be enabled via senvcfg (control flow integrity, > pointer masking, etc). > > As an example if cache zeroing instructions are used by app binary, I > expect it to be used in following > manner > > - Explicitly inserting cbo.zero by application developer > - Some compiler flag which ensures that structures larger than cache > line gets zeroed by cbo.zero > > In either of the cases, the developer is not expecting to target it to > a specific hart on SoC and instead expect it to work. > There might be libraries (installed via sudo apt get) with cache zero > support in them which may run in different address spaces. > Should the library be aware of the CPU on which it's running. Now > whoever is running these binaries should be aware which CPUs > they get assigned to in order to avoid faults? > > That seems excessive, doesn't it? > It might be safe to assume extensions like Zicboz will be on all harts if any, but I wouldn't expect all extensions in the future to be present on all available harts. For example, some Arm big.LITTLE boards only have virt extensions on big CPUs. When a VMM wants to launch a guest it must be aware of which CPUs it will use for the VCPU threads. For riscv, we have the which-cpus variant of the hwprobe syscall to try and make this type of thing easier to manage, but I agree it will still be a pain for software since it will need to make that query and then set its affinity, which is something it hasn't needed to do before. Thanks, drew
