On 16/03/2024 19:30, Trilok Soni wrote:
On 3/14/2024 11:38 AM, Sudeep Holla wrote:
On Thu, Mar 14, 2024 at 05:35:23AM -0700, Nikunj Kela wrote:
On 3/14/2024 3:55 AM, Sudeep Holla wrote:
Nope, the point was will the presence of (available) scmi/rpmi device
node suffice if we are thinking of single board level property or
compatible. I was not mixing the discussion of whether adding such
a property to each needed device node in this discussion to keep it
simple. I have already expressed my opinion on that.
I am sure qcom will go and do what they want which may work fine for
qcom specific drivers but it will not work for a generic IP driver
used by many vendors. Not sure if Qcom SoCs are just bundle of Qcom
specific IPs or they do have some generic non-Qcom IPs. Lets us take
SMMU as example. If the SCMI/RPMI controls the power to it, would you
go and add this new compatible in the generic SMMU bindings and add
support in the driver for that ? That is big NO as the driver would
just need to use std framework interface(doesn't matter Runtime PM/Clock/
Reset/genpd/PM OPP). That means they don't need any specific bindings
to inform SMMU driver that the power is f/w managed.
For SMMU, we dont need to make any changes in the existing driver. Simple
power-domain over SCMI will suffice since we don't need to do clock scaling
etc. for SMMU. We will use this new property in Qualcomm emac, UFS, USB,
QUPs(i2c,spi,uart) drivers.
Sure, as I mentioned in the beginning itself, it is all in the Qcom
specific drivers, well you can hack it in any ugly way you want to get
things working even in the upstream.
But just stop and think for a moment how would you solve this problem
if you had few Synopsys Designware IPs instead of all those Qcom specific
IPs. Will your suggested solution work or if it works will that even scale ?
As I said I will shut up and you can do whatever in your drivers, but I
just don't want this to set bad example for other vendors who may not have
all their own IPs and may use some generic ones which means they will now
follow your solution and go and change those drivers now.
The main point I am trying to make is the provide blocks/nodes should
have the information that it is firmware managed. The consumer nodes
have no business to know that information.
I will leave it to you now as I can't stop what you define as Qcom specific
and what changes you can make in those Qcom specific drivers.
I agree with what Sudeep has brought up for the SMMU and USB is another example
where we can have 3rd party phy / Synopsys IPs on the QC devices.
This needs more discussion before we even consider adding scmi perf to
these drivers.
Big question here is implementation details of the Device SCMI perf
With new SCMI Perf changes all the driver resources handling are moved
to perf or power domains.
But is this abstraction correct?
Any standards followed Or Is any of this documented?
AFAIU, The whole resources moving to SCMI perf are done in pretty adhoc
way.(ex: making regulators as power domains, and clks as perf domains..
and in some cases clks are power domains, ...)
How can we make sure that other vendors also abstract device resources
exactly like what Qualcomm SCMI Server?
What I feel so far is that all of the resources are moved to scmi perf
in a very Qualcomm implementation way.
I have no objections to having a generic property or way to determine
this more generically. As long as this is explicitly documented as part
of Device tree binding for all the devices and done correctly.
thanks,
Srini
From the QCOM side my concern is that I don't want to have QC specific hacks,
because today's on-SOC IP can be tomorrow's discrete IP attached over
PCIe or USB. Think of NPU or Video IP attached to third party
Application processor (though it may not exist today but we never know).
