On Wed, 06 Mar 2024 10:56:46 +0100, Johan Hovold wrote:
> This series addresses a few problems with the sc8280xp PCIe
> implementation.
>
> The DWC PCIe controller can either use its internal MSI controller or an
> external one such as the GICv3 ITS. Enabling the latter allows for
> assigning affinity to individual interrupts, but results in a large
> amount of Correctable Errors being logged on both the Lenovo ThinkPad
> X13s and the sc8280xp-crd reference design.
>
> [...]
Applied, thanks!
[4/5] arm64: dts: qcom: sc8280xp: add missing PCIe minimum OPP
commit: 2b621971554a94094cf489314dc1c2b65401965c
[5/5] arm64: dts: qcom: sc8280xp: enable GICv3 ITS for PCIe
commit: 81051f14a66c3913f1d219bd97e47002f1dc91de
Best regards,
--
Bjorn Andersson <andersson@xxxxxxxxxx>
