On Mon, 18 Mar 2024 04:39:46 +0000
Amit Singh Tomar <amitsinght@xxxxxxxxxxx> wrote:
Hi Amit,
can you please try to reply using the standard quoted line prefix ('>'),
and cut the header? I almost missed your question in here.
> Hi,
>
> -----Original Message-----
> From: linux-arm-kernel <linux-arm-kernel-bounces@xxxxxxxxxxxxxxxxxxx> On Behalf Of Andre Przywara
> Sent: Monday, March 18, 2024 6:42 AM
> To: Yangtao Li <tiny.windzz@xxxxxxxxx>; Viresh Kumar <vireshk@xxxxxxxxxx>; Nishanth Menon <nm@xxxxxx>; Stephen Boyd <sboyd@xxxxxxxxxx>; Rob Herring <robh+dt@xxxxxxxxxx>; Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx>; Conor Dooley <conor+dt@xxxxxxxxxx>; Chen-Yu Tsai <wens@xxxxxxxx>; Jernej Skrabec <jernej.skrabec@xxxxxxxxx>; Samuel Holland <samuel@xxxxxxxxxxxx>; Rafael J . Wysocki <rafael@xxxxxxxxxx>
> Cc: linux-pm@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux-sunxi@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; Brandon Cheo Fusi <fusibrandon13@xxxxxxxxx>; Martin Botka <martin.botka@xxxxxxxxxxxxxx>; Martin Botka <martin.botka1@xxxxxxxxx>
> Subject: [EXTERNAL] [PATCH v2 8/8] arm64: dts: allwinner: h616: enable DVFS for all boards
>
>
> With the DT bindings now describing the format of the CPU OPP tables, we can include the OPP table in each board's .dts file, and specify the CPU power supply.
> This allows to enable DVFS, and get up to 50% of performance benefit in the highest OPP, or up to 60% power savings in the lowest OPP, compared to the fixed 1GHz @ 1.0V OPP we are running in by default
> at the moment.
> [Amit] Could you please elaborate, what test were run to see 50 % performance benefits?
Currently all H616 boards running mainline firmware and kernels run at a
fixed 1GHz CPU clock frequency. If you happen to have a good SoC (bin 1 or
3), this patchset will allow you to run at 1.5 GHz, which is 50% faster.
So anything that scales with CPU frequency should run much quicker.
Cheers,
Andre
> Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx>
> ---
> .../boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi | 5 +++++
> arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts | 5 +++++
> arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts | 5 +++++
> .../arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts | 5 +++++ arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts | 5 +++++
> .../boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts | 5 +++++
> 6 files changed, 30 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
> index 1fed2b46cfe87..86e58d1ed23ea 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
> @@ -6,6 +6,7 @@
> /dts-v1/;
>
> #include "sun50i-h616.dtsi"
> +#include "sun50i-h616-cpu-opp.dtsi"
>
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> @@ -62,6 +63,10 @@ wifi_pwrseq: wifi-pwrseq {
> };
> };
>
> +&cpu0 {
> + cpu-supply = <®_dcdc2>;
> +};
> +
> &mmc0 {
> vmmc-supply = <®_dldo1>;
> /* Card detection pin is not connected */ diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
> index b5d713926a341..a360d8567f955 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
> @@ -6,12 +6,17 @@
> /dts-v1/;
>
> #include "sun50i-h616-orangepi-zero.dtsi"
> +#include "sun50i-h616-cpu-opp.dtsi"
>
> / {
> model = "OrangePi Zero2";
> compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616"; };
>
> +&cpu0 {
> + cpu-supply = <®_dcdca>;
> +};
> +
> &emac0 {
> allwinner,rx-delay-ps = <3100>;
> allwinner,tx-delay-ps = <700>;
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
> index 959b6fd18483b..26d25b5b59e0f 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
> @@ -6,6 +6,7 @@
> /dts-v1/;
>
> #include "sun50i-h616.dtsi"
> +#include "sun50i-h616-cpu-opp.dtsi"
>
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> @@ -32,6 +33,10 @@ reg_vcc5v: vcc5v {
> };
> };
>
> +&cpu0 {
> + cpu-supply = <®_dcdca>;
> +};
> +
> &ehci0 {
> status = "okay";
> };
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
> index 21ca1977055d9..6a4f0da972330 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
> @@ -6,6 +6,7 @@
> /dts-v1/;
>
> #include "sun50i-h616.dtsi"
> +#include "sun50i-h616-cpu-opp.dtsi"
>
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> @@ -53,6 +54,10 @@ reg_vcc3v3: vcc3v3 {
> };
> };
>
> +&cpu0 {
> + cpu-supply = <®_dcdc2>;
> +};
> +
> &ehci1 {
> status = "okay";
> };
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
> index b3b1b8692125f..e1cd7572a14ce 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
> @@ -6,12 +6,17 @@
> /dts-v1/;
>
> #include "sun50i-h616-orangepi-zero.dtsi"
> +#include "sun50i-h616-cpu-opp.dtsi"
>
> / {
> model = "OrangePi Zero3";
> compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618"; };
>
> +&cpu0 {
> + cpu-supply = <®_dcdc2>;
> +};
> +
> &emac0 {
> allwinner,tx-delay-ps = <700>;
> phy-mode = "rgmii-rxid";
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts
> index 8ea1fd41aebaa..2dd178a164fbe 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts
> @@ -6,6 +6,7 @@
> /dts-v1/;
>
> #include "sun50i-h616.dtsi"
> +#include "sun50i-h616-cpu-opp.dtsi"
>
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> @@ -41,6 +42,10 @@ reg_vcc3v3: vcc3v3 {
> };
> };
>
> +&cpu0 {
> + cpu-supply = <®_dcdc2>;
> +};
> +
> &ehci0 {
> status = "okay";
> };
> --
> 2.35.8
>
>
