Reorder the attributes of the Global Interrupt Controller node to fit DTS style guidelines. Signed-off-by: Justin Swartz <justin.swartz@xxxxxxxxxxxxxxxx> --- arch/mips/boot/dts/ralink/mt7621.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi index 1fbe345bd..8aa9eba68 100644 --- a/arch/mips/boot/dts/ralink/mt7621.dtsi +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi @@ -338,15 +338,15 @@ gic: interrupt-controller@1fbc0000 { compatible = "mti,gic"; reg = <0x1fbc0000 0x2000>; - interrupt-controller; #interrupt-cells = <3>; + interrupt-controller; mti,reserved-cpu-vectors = <7>; timer { compatible = "mti,gic-timer"; - interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>; clocks = <&sysc MT7621_CLK_CPU>; + interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>; }; }; --