On Thu, Mar 14, 2024 at 09:25:12PM +0800, Peng Fan (OSS) wrote: > From: Peng Fan <peng.fan@xxxxxxx> > > i.MX95 DISPLAY_MASTER_CSR includes registers to control DSI clock settings, > clock gating, and pixel link select. Add dt-binding for it. > > Signed-off-by: Peng Fan <peng.fan@xxxxxxx> > --- > .../clock/nxp,imx95-display-master-csr.yaml | 62 ++++++++++++++++++++++ > 1 file changed, 62 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-display-master-csr.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-display-master-csr.yaml > new file mode 100644 > index 000000000000..ed0ec3a24d09 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-display-master-csr.yaml > @@ -0,0 +1,62 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/nxp,imx95-display-master-csr.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP i.MX95 Display Master Block Control > + > +maintainers: > + - Peng Fan <peng.fan@xxxxxxx> > + > +properties: > + compatible: > + items: > + - const: nxp,imx95-display-master-csr > + - const: syscon > + > + reg: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + '#clock-cells': > + const: 1 > + description: > + The clock consumer should specify the desired clock by having the clock > + ID in its "clocks" phandle cell. See > + include/dt-bindings/clock/nxp,imx95-clock.h Forget this header changes here?
