Hi Chanwoo, On Tuesday 03 February 2015 05:43 AM, Chanwoo Choi wrote:
This patch adds the mux/divider/gate clocks for CMU_MSCL domain which generates the clocks for M2M (Memory to Memory) scaler, JPEG IPs. Cc: Sylwester Nawrocki <s.nawrocki@xxxxxxxxxxx> Cc: Tomasz Figa <tomasz.figa@xxxxxxxxx> Signed-off-by: Chanwoo Choi <cw00.choi@xxxxxxxxxxx> Acked-by: Inki Dae <inki.dae@xxxxxxxxxxx> --- .../devicetree/bindings/clock/exynos5433-clock.txt | 20 +++ drivers/clk/samsung/clk-exynos5433.c | 185 +++++++++++++++++++++ include/dt-bindings/clock/exynos5433.h | 41 ++++- 3 files changed, 245 insertions(+), 1 deletion(-)
Verified clock tree, clock register and bitfield settings against UM. Changes looks OK to me. Reviewed-by: Pankaj Dubey <pankaj.dubey@xxxxxxxxxxx> Thanks, Pankaj Dubey -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
