Children of NAND controllers have only chip select, so address without
the size. Correct size-cells as reported by dtbs_check:
s5pv210-galaxys.dtb: onenand@b0600000: #size-cells:0:0: 0 was expected
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
---
arch/arm/boot/dts/samsung/s5pv210.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/samsung/s5pv210.dtsi b/arch/arm/boot/dts/samsung/s5pv210.dtsi
index 23459430410f..9720573d84dc 100644
--- a/arch/arm/boot/dts/samsung/s5pv210.dtsi
+++ b/arch/arm/boot/dts/samsung/s5pv210.dtsi
@@ -82,7 +82,7 @@ onenand: nand-controller@b0600000 {
clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
clock-names = "bus", "onenand";
#address-cells = <1>;
- #size-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
--
2.34.1
