Re: [PATCH v9 03/10] irqchip/riscv-intc: Introduce Andes hart-level interrupt controller

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On Fri, 23 Feb 2024 01:06:44 PST (-0800), tglx@xxxxxxxxxxxxx wrote:
On Fri, Feb 23 2024 at 09:54, Thomas Gleixner wrote:
On Fri, Feb 23 2024 at 09:49, Thomas Gleixner wrote:
On Thu, Feb 22 2024 at 22:36, Thomas Gleixner wrote:
Palmer, feel free to take this through the riscv tree. I have no other
changes pending against that driver.

Aargh. Spoken too early. This conflicts with Anups AIA series.

  https://lore.kernel.org/all/20240222094006.1030709-1-apatel@xxxxxxxxxxxxxxxx

So I rather take the pile through my tree and deal with the conflicts
localy than inflicting it on next.

Palmer?

Nah. I just apply the two intc patches localy and give you a tag to pull
from so we carry both the same commits. Then I can deal with the
conflicts on my side trivially.

Here you go:

  git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq-for-riscv-02-23-24

Contains:

  f4cc33e78ba8 ("irqchip/riscv-intc: Introduce Andes hart-level interrupt controller")
  96303bcb401c ("irqchip/riscv-intc: Allow large non-standard interrupt number")

on top of v6.8-rc1

Sorry I missed this. I just merged this into my testing tree, it might take a bit to show up because I've managed to break my VPN so I can't poke the tester box right now...


Thanks,

        tglx




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