On 12/03/2024 12:19, Yang Xiwen wrote: >> Yang Xiwen (3): >> arm64: dts: hi3798cv200: fix the size of GICR >> arm64: dts: hi3798cv200: add GICH, GICV register space and irq >> arm64: dts: hi3798cv200: add cache info >> >> arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 43 +++++++++++++++++++++++++- >> 1 file changed, 42 insertions(+), 1 deletion(-) >> --- >> base-commit: 8d3dea210042f54b952b481838c1e7dfc4ec751d >> change-id: 20240218-cache-11c8bf7566c2 >> >> Best regards, > > May someone apply this patchset to their tree so that it can land in > stable at the end? This is a fix, not adding new functionalities. It's > been 2 weeks already. It's merge window, what do you expect to happen now? Please observe the process timelines. For arm-soc usually the cut-off is around rc6. When did you send it? Week before rc6, so a bit late. Anyway, I bookmarked this patchset, so if no one applies within some time after merge window, I'll take it. Best regards, Krzysztof
