On 07/03/2024 05:17, Md Sadre Alam wrote: There is no commit msg. Subject did not improve. This is a friendly reminder during the review process. It seems my or other reviewer's previous comments were not fully addressed. Maybe the feedback got lost between the quotes, maybe you just forgot to apply it. Please go back to the previous discussion and either implement all requested changes or keep discussing them. Thank you. > Co-developed-by: Sricharan Ramabadhran <quic_srichara@xxxxxxxxxxx> > Signed-off-by: Sricharan Ramabadhran <quic_srichara@xxxxxxxxxxx> > Co-developed-by: Varadarajan Narayanan <quic_varada@xxxxxxxxxxx> > Signed-off-by: Varadarajan Narayanan <quic_varada@xxxxxxxxxxx> > Signed-off-by: Md Sadre Alam <quic_mdalam@xxxxxxxxxxx> > --- > Change in [v3] > > * Updated commit message, removed "dt-bindings" from commit > message > > * Updated compatible name as file name > > * Added hardware description > > * Documented clock-name > > * Moved dma-names property to top > > * Droped unused label "qpic_nand" > > * Fixed indentation in example dt node > > Change in [v2] > > * Added initial support for dt-bindings > > Change in [v1] > > * This patch was not included in [v1] > > .../bindings/spi/qcom,spi-qpic-snand.yaml | 83 +++++++++++++++++++ > 1 file changed, 83 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml > > diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml > new file mode 100644 > index 000000000000..3d20a4bc567f > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml > @@ -0,0 +1,83 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/spi/qcom,spi-qpic-snand.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm QPIC NAND controller > + > +maintainers: > + - Md sadre Alam <quic_mdalam@xxxxxxxxxxx> > + > +description: | Do not need '|' unless you need to preserve formatting. > + The QCOM QPI-SPI-NAND flash controller is an extended version of > + the QCOM QPIC NAND flash controller. It can work both in serial > + and parallel mode. It supports typical SPI-NAND page cache > + operations in single, dual or quad IO mode with pipelined ECC > + encoding/decoding using the QPIC ECC HW engine. > + > +allOf: > + - $ref: /schemas/spi/spi-controller.yaml# > + > +properties: > + compatible: > + enum: > + - qcom,spi-qpic-snand > + > + reg: > + maxItems: 1 > + > + clocks: > + minItems: 3 Drop > + maxItems: 3 > + > + clock-names: > + items: > + - const: core > + - const: aon > + - const: iom Missing blank line > + dmas: > + items: > + - description: tx DMA channel > + - description: rx DMA channel > + - description: cmd DMA channel > + > + dma-names: > + items: > + - const: tx > + - const: rx > + - const: cmd > + Best regards, Krzysztof
