From: Yang Xiwen <forbidden405@xxxxxxxxxxx>
Hi3798MV200 INNO USB2 PHY is attached directly to system bus. Add
compatible "hisilicon,hi3798mv200-usb2-phy" for it. The ports of
Hi3798MV200 INNO PHY has its own address space, so
Signed-off-by: Yang Xiwen <forbidden405@xxxxxxxxxxx>
---
.../bindings/phy/hisilicon,inno-usb2-phy.yaml | 31 ++++++++++++++++++++--
1 file changed, 29 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/hisilicon,inno-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/hisilicon,inno-usb2-phy.yaml
index 7f0811a2dc2b..92559bdc4fef 100644
--- a/Documentation/devicetree/bindings/phy/hisilicon,inno-usb2-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/hisilicon,inno-usb2-phy.yaml
@@ -15,6 +15,7 @@ properties:
- enum:
- hisilicon,hi3798cv200-usb2-phy
- hisilicon,hi3798mv100-usb2-phy
+ - hisilicon,hi3798mv200-usb2-phy
reg:
maxItems: 1
@@ -22,18 +23,29 @@ properties:
peripheral controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798CV200 SoC,
or direct MMIO address space.
+ ranges:
+ maxItems: 1
+
'#address-cells':
const: 1
'#size-cells':
- const: 0
+ enum: [0, 1]
clocks:
maxItems: 1
description: reference clock
resets:
- maxItems: 1
+ minItems: 1
+ items:
+ - description: port reset
+ - description: optional external test bus reset
+
+ reset-names:
+ items:
+ - const: port
+ - const: test
patternProperties:
'phy@[0-9a-f]+':
@@ -66,6 +78,21 @@ required:
- '#size-cells'
- resets
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: hisilicon,hi3798mv200-usb2-phy
+ then:
+ required:
+ - ranges
+ - reset-names
+ else:
+ properties:
+ ranges: false
+ reset-names: false
+
additionalProperties: false
examples:
--
2.43.0
