On Fri, 23 Feb 2024 22:58:22 +0530, Varshini Rajendran wrote: > Allow PLLADIV2 and LVDSPLL to be referenced as a PMC_TYPE_CORE > clock from phandle in DT for sam9x7 SoC family. > > Signed-off-by: Varshini Rajendran <varshini.rajendran@xxxxxxxxxxxxx> > --- > include/dt-bindings/clock/at91.h | 4 ++++ > 1 file changed, 4 insertions(+) > Acked-by: Rob Herring <robh@xxxxxxxxxx>
