Hi Frank,
thanks for the patch.
Am Mittwoch, 28. Februar 2024, 20:54:57 CET schrieb Frank Li:
> From: Dong Aisheng <aisheng.dong@xxxxxxx>
>
> Add cm40 subsystem dtsi.
>
> Signed-off-by: Dong Aisheng <aisheng.dong@xxxxxxx>
> Signed-off-by: Frank Li <Frank.Li@xxxxxxx>
> ---
> arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi | 67 +++++++++++++++++++++++++
> arch/arm64/boot/dts/freescale/imx8dxl.dtsi | 2 +
> arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 1 +
> 3 files changed, 70 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi
> new file mode 100644
> index 0000000000000..b1d626862ddf8
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi
> @@ -0,0 +1,67 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2019 NXP
> + * Dong Aisheng <aisheng.dong@xxxxxxx>
> + */
> +
> +#include <dt-bindings/firmware/imx/rsrc.h>
> +
> +cm40_subsys: bus@34000000 {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x34000000 0x0 0x34000000 0x4000000>;
You should set interrupt-parent = <&cm40_intmux> here already.
So you can skip it for all subsequent nodes, but the cm40_intmux itself.
> +
> + cm40_ipg_clk: clock-cm40-ipg {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <132000000>;
> + clock-output-names = "cm40_ipg_clk";
> + };
> +
> + cm40_i2c: i2c@37230000 {
> + compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
> + reg = <0x37230000 0x1000>;
> + interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-parent = <&cm40_intmux>;
I personally prefer the parent to be stated first.
> + clocks = <&cm40_i2c_lpcg 0>,
> + <&cm40_i2c_lpcg 1>;
> + clock-names = "per", "ipg";
> + assigned-clocks = <&clk IMX_SC_R_M4_0_I2C IMX_SC_PM_CLK_PER>;
> + assigned-clock-rates = <24000000>;
> + power-domains = <&pd IMX_SC_R_M4_0_I2C>;
> + status = "disabled";
> + };
> +
> + cm40_i2c_lpcg: clock-controller@37630000 {
Please sort the nodes by bus address.
> + compatible = "fsl,imx8qxp-lpcg";
> + reg = <0x37630000 0x1000>;
> + #clock-cells = <1>;
> + clocks = <&clk IMX_SC_R_M4_0_I2C IMX_SC_PM_CLK_PER>,
> + <&cm40_ipg_clk>;
> + clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>;
> + clock-output-names = "cm40_lpcg_i2c_clk",
> + "cm40_lpcg_i2c_ipg_clk";
> + power-domains = <&pd IMX_SC_R_M4_0_I2C>;
> + };
> +
> + cm40_intmux: intmux@37400000 {
> + compatible = "fsl,imx-intmux";
> + reg = <0x37400000 0x1000>;
> + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-controller;
> + interrupt-parent = <&gic>;
> + #interrupt-cells = <2>;
> + clocks = <&cm40_ipg_clk>;
> + clock-names = "ipg";
> + power-domains = <&pd IMX_SC_R_M4_0_INTMUX>;
> + status = "disabled";
> + };
> +};
> diff --git a/arch/arm64/boot/dts/freescale/imx8dxl.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl.dtsi
> index a0674c5c55766..9d49c75a26222 100644
> --- a/arch/arm64/boot/dts/freescale/imx8dxl.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8dxl.dtsi
> @@ -5,6 +5,7 @@
>
> #include <dt-bindings/clock/imx8-clock.h>
> #include <dt-bindings/dma/fsl-edma.h>
> +#include <dt-bindings/clock/imx8-lpcg.h>
> #include <dt-bindings/firmware/imx/rsrc.h>
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> @@ -231,6 +232,7 @@ xtal24m: clock-xtal24m {
> };
>
> /* sorted in register address */
> + #include "imx8-ss-cm40.dtsi"
> #include "imx8-ss-adma.dtsi"
> #include "imx8-ss-conn.dtsi"
> #include "imx8-ss-ddr.dtsi"
> diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> index 10e16d84c0c3b..c49fb1282ae65 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> @@ -316,6 +316,7 @@ map0 {
>
> /* sorted in register address */
> #include "imx8-ss-img.dtsi"
> + #include "imx8-ss-cm40.dtsi"
cm40 subsystem is bus@34000000, so IMHO it should go below vpu subsystem,
which is vpu@2c000000.
Best regards,
Alexander
> #include "imx8-ss-vpu.dtsi"
> #include "imx8-ss-gpu0.dtsi"
> #include "imx8-ss-adma.dtsi"
>
>
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