On 1/30/24 18:12, Rob Herring wrote:
On Wed, Jan 17, 2024 at 11:04:52PM +0530, Sibi Sankar wrote:
Add devicetree binding for CPUSS Control Processor (CPUCP) mailbox
controller.
Signed-off-by: Sibi Sankar <quic_sibis@xxxxxxxxxxx>
---
.../bindings/mailbox/qcom,cpucp-mbox.yaml | 51 +++++++++++++++++++
1 file changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
diff --git a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
new file mode 100644
index 000000000000..2617e5555acb
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mailbox/qcom,cpucp-mbox.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. CPUCP Mailbox Controller
+
+maintainers:
+ - Sibi Sankar <quic_sibis@xxxxxxxxxxxxxxxx>
+
+description:
+ The CPUSS Control Processor (CPUCP) mailbox controller enables communication
+ between AP and CPUCP by acting as a doorbell between them.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - qcom,x1e80100-cpucp-mbox
+ - const: qcom,cpucp-mbox
A generic fallback implies multiple devices use the same unchanged
block. That seems doubtful given you have not defined any others and
given Konrad's comments.
FWIW Sibi and I talked about this a bit off-list, this mailbox is
apparently new and has nothing to do with what I mentioned on other
platforms
Konrad
