On 21/02/2024 17:41, Yang Xiwen via B4 Relay wrote: > From: Yang Xiwen <forbidden405@xxxxxxxxxxx> > > Add clock definitions for core CRG and mcu CRG for Hi3798MV200 SoC. > > Signed-off-by: Yang Xiwen <forbidden405@xxxxxxxxxxx> > --- > .../dt-bindings/clock/hisilicon,hi3798mv200-crg.h | 150 +++++++++++++++++++++ > .../clock/hisilicon,hi3798mv200-sysctrl.h | 21 +++ > 2 files changed, 171 insertions(+) > > diff --git a/include/dt-bindings/clock/hisilicon,hi3798mv200-crg.h b/include/dt-bindings/clock/hisilicon,hi3798mv200-crg.h > new file mode 100644 > index 000000000000..bf6b6b855724 > --- /dev/null > +++ b/include/dt-bindings/clock/hisilicon,hi3798mv200-crg.h > @@ -0,0 +1,150 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > +/* > + * Copyright (c) 2024 Yang Xiwen <forbidden405@xxxxxxxxxxx> > + */ > + > +#ifndef __DTS_HI3798MV200_CRG_H __DT_BINDINGS_CLOCK_HI3798MV200_CRG_H That's not a DTS. > +#define __DTS_HI3798MV200_CRG_H > + > +/* clocks provided by core CRG */ > +#define HI3798MV200_OSC_CLK 0 > +#define HI3798MV200_APB_CLK 1 > +#define HI3798MV200_AHB_CLK 2 > +#define HI3798MV200_APLL_CLK 3 > +#define HI3798MV200_BPLL_CLK 4 > +#define HI3798MV200_DPLL_CLK 5 > +#define HI3798MV200_VPLL_CLK 6 > +#define HI3798MV200_HPLL_CLK 7 > +#define HI3798MV200_EPLL_CLK 8 > +#define HI3798MV200_QPLL_CLK 9 > +#define HI3798MV200_PERI_DIV_CLK 10 > +#define HI3798MV200_CORE_BUS_CLK 11 > +#define HI3798MV200_MDE0_BUS_CLK 12 > +#define HI3798MV200_MDE1_BUS_CLK 13 > +#define HI3798MV200_MDE2_BUS_CLK 14 > +#define HI3798MV200_MDE3_BUS_CLK 15 > +/* UART1 does not exist */ > +#define HI3798MV200_UART2_CLK 16 > +#define HI3798MV200_UART3_CLK 17 > +#define HI3798MV200_I2C0_CLK 18 > +#define HI3798MV200_I2C1_CLK 19 > +#define HI3798MV200_I2C2_CLK 20 > +#define HI3798MV200_SPI0_CLK 21 > +#define HI3798MV200_SCI0_CLK 22 > +#define HI3798MV200_SCI1_CLK 23 > +#define HI3798MV200_VDH_CLK 24 > +#define HI3798MV200_VDH_DSP_CLK 25 You have mixed/mess indentation. > +#define HI3798MV200_JPGD_CLK 26 > +#define HI3798MV200_PGD_CLK 27 Best regards, Krzysztof
