On Tue, Feb 20, 2024 at 3:43 PM Thomas Gleixner <tglx@xxxxxxxxxxxxx> wrote: > > On Tue, Feb 20 2024 at 11:37, Anup Patel wrote: > > > The RISC-V advanced interrupt architecture (AIA) extends the per-HART > > local interrupts in following ways: > > 1. Minimum 64 local interrupts for both RV32 and RV64 > > 2. Ability to process multiple pending local interrupts in same > > interrupt handler > > 3. Priority configuration for each local interrupts > > 4. Special CSRs to configure/access the per-HART MSI controller > > > > We add support for #1 and #2 described above in the RISC-V intc > > driver. > > S/We add/Add/ Okay, I will update. > > > +static asmlinkage void riscv_intc_aia_irq(struct pt_regs *regs) > > +{ > > + unsigned long topi; > > + > > + while ((topi = csr_read(CSR_TOPI))) > > + generic_handle_domain_irq(intc_domain, > > + topi >> TOPI_IID_SHIFT); > > Please let it stick out. You got 100 characters. All over the place. Okay, I will update. Regards, Anup