Hi Alexander, Thanks for your comments, > > > Hi, > > thanks for the update. > > Am Dienstag, 20. Februar 2024, 04:23:53 CET schrieb Sandor Yu: > > Add bindings for Freescale iMX8MQ DP and HDMI PHY. > > > > Signed-off-by: Sandor Yu <Sandor.yu@xxxxxxx> > > Reviewed-by: Rob Herring <robh@xxxxxxxxxx> > > --- > > v9->v14: > > *No change. > > > > .../bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml | 53 > > +++++++++++++++++++ > > 1 file changed, 53 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml > > b/Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml > > new file mode 100644 > > index 0000000000000..917f113503dca > > --- /dev/null > > +++ > b/Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yam > > +++ l > > @@ -0,0 +1,53 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 > > +--- > > +$id: > > +http://devi/ > > > +cetree.org%2Fschemas%2Fphy%2Ffsl%2Cimx8mq-dp-hdmi-phy.yaml%23&da > ta=05 > > > +%7C02%7CSandor.yu%40nxp.com%7Ce79b4d15c204494963c508dc31fbab5d > %7C686e > > > +a1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638440204190687801%7C > Unknown%7 > > > +CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWw > iLCJX > > > +VCI6Mn0%3D%7C0%7C%7C%7C&sdata=rKWiYc1wbOvKMO%2BWnvT6agxo > 9V%2B1ndZVTxh > > +gLT0g7h8%3D&reserved=0 > > +$schema: > > +http://devi/ > > > +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=05%7C02%7CSandor.y > u%40n > > > +xp.com%7Ce79b4d15c204494963c508dc31fbab5d%7C686ea1d3bc2b4c6fa9 > 2cd99c5 > > > +c301635%7C0%7C0%7C638440204190709341%7CUnknown%7CTWFpbGZsb > 3d8eyJWIjoi > > > +MC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0 > %7C%7C% > > > +7C&sdata=%2FuCSz0aVVsRLorOqrorbZIyT7iU5BavPKCbA9qL9qDI%3D&reserv > ed=0 > > + > > +title: Cadence HDP-TX DP/HDMI PHY for Freescale i.MX8MQ SoC > > + > > +maintainers: > > + - Sandor Yu <sandor.yu@xxxxxxx> > > + > > +properties: > > + compatible: > > + enum: > > + - fsl,imx8mq-dp-phy > > + - fsl,imx8mq-hdmi-phy > > While reading cdns-mhdp8501-core.c I'm not so sure about this. There is only > a single PHY which can be configured for either DP or HDMI. > Using separate compatibles for that somehow bugs me. > Maybe the DT maintainers can add some input if this should be single or > double compatibles. > When user enable MHDP8501 HDMI or DP, he should clearly know which type he want to enable, >From board type, flash.bin(firmware) to dts(connector and phy type), they are all need align to HDMI or DP. B.R Sandor > Thanks and best regards, > Alexander > > > + > > + reg: > > + maxItems: 1 > > + > > + clocks: > > + items: > > + - description: PHY reference clock. > > + - description: APB clock. > > + > > + clock-names: > > + items: > > + - const: ref > > + - const: apb > > + > > + "#phy-cells": > > + const: 0 > > + > > +required: > > + - compatible > > + - reg > > + - clocks > > + - clock-names > > + - "#phy-cells" > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/imx8mq-clock.h> > > + #include <dt-bindings/phy/phy.h> > > + dp_phy: phy@32c00000 { > > + compatible = "fsl,imx8mq-dp-phy"; > > + reg = <0x32c00000 0x100000>; > > + #phy-cells = <0>; > > + clocks = <&hdmi_phy_27m>, <&clk > IMX8MQ_CLK_DISP_APB_ROOT>; > > + clock-names = "ref", "apb"; > > + }; > > > > > -- > TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany > Amtsgericht München, HRB 105018 > Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider > http://www.tq-/ > group.com%2F&data=05%7C02%7CSandor.yu%40nxp.com%7Ce79b4d15c2044 > 94963c508dc31fbab5d%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0 > %7C638440204190726471%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjA > wMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7 > C&sdata=7xs1%2FC%2BK1cSFDc3rlBEZdNBsYw6Gc8AR6CWr2Djz4s0%3D&res > erved=0 >
