Hello, On Mon, Feb 12, 2024 at 08:17:29PM +0800, Jingbao Qiu wrote: > Implement the PWM driver for CV1800. > > Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@xxxxxxxxx> > --- > drivers/pwm/Kconfig | 10 ++ > drivers/pwm/Makefile | 1 + > drivers/pwm/pwm-cv1800.c | 248 +++++++++++++++++++++++++++++++++++++++ > 3 files changed, 259 insertions(+) > create mode 100644 drivers/pwm/pwm-cv1800.c > > diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig > index 4b956d661755..455f07af94f7 100644 > --- a/drivers/pwm/Kconfig > +++ b/drivers/pwm/Kconfig > @@ -186,6 +186,16 @@ config PWM_CROS_EC > PWM driver for exposing a PWM attached to the ChromeOS Embedded > Controller. > > +config PWM_CV1800 > + tristate "Sophgo CV1800 PWM driver" > + depends on ARCH_SOPHGO || COMPILE_TEST > + help > + Generic PWM framework driver for the Sophgo CV1800 series > + SoCs. > + > + To compile this driver as a module, build the dependecies > + as modules, this will be called pwm-cv1800. > + > config PWM_DWC_CORE > tristate > depends on HAS_IOMEM > diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile > index c5ec9e168ee7..6c3c4a07a316 100644 > --- a/drivers/pwm/Makefile > +++ b/drivers/pwm/Makefile > @@ -15,6 +15,7 @@ obj-$(CONFIG_PWM_CLK) += pwm-clk.o > obj-$(CONFIG_PWM_CLPS711X) += pwm-clps711x.o > obj-$(CONFIG_PWM_CRC) += pwm-crc.o > obj-$(CONFIG_PWM_CROS_EC) += pwm-cros-ec.o > +obj-$(CONFIG_PWM_CV1800) += pwm-cv1800.o > obj-$(CONFIG_PWM_DWC_CORE) += pwm-dwc-core.o > obj-$(CONFIG_PWM_DWC) += pwm-dwc.o > obj-$(CONFIG_PWM_EP93XX) += pwm-ep93xx.o > diff --git a/drivers/pwm/pwm-cv1800.c b/drivers/pwm/pwm-cv1800.c > new file mode 100644 > index 000000000000..3d7f2ff3a6c2 > --- /dev/null > +++ b/drivers/pwm/pwm-cv1800.c > @@ -0,0 +1,248 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * pwm-cv1800.c: PWM driver for Sophgo cv1800 > + * > + * Author: Jingbao Qiu <qiujingbao.dlmu@xxxxxxxxx> > + * > + * Limitations: > + * - It output low when PWM channel disabled. > + * - This pwm device supports dynamic loading of PWM parameters. When PWMSTART > + * is written from 0 to 1, the register value (HLPERIODn, PERIODn) will be > + * temporarily stored inside the PWM. If you want to dynamically change the > + * waveform during PWM output, after writing the new value to HLPERIODn and > + * PERIODn, write 1 and then 0 to PWMUPDATE[n] to make the new value effective. > + * - Supports up to Rate/2 output, and the lowest is about Rate/(2^30-1). > + * - By setting HLPERIODn to 0, can produce 100% duty cycle. > + */ > + > +#include <linux/clk.h> > +#include <linux/kernel.h> > +#include <linux/module.h> > +#include <linux/of.h> > +#include <linux/platform_device.h> > +#include <linux/pwm.h> > +#include <linux/regmap.h> > + > +#define PWM_CV1800_HLPERIOD_BASE 0x00 > +#define PWM_CV1800_PERIOD_BASE 0x04 > +#define PWM_CV1800_PWM_CV1800_POLARITY 0x40 > +#define PWM_CV1800_START 0x44 > +#define PWM_CV1800_DONE 0x48 > +#define PWM_CV1800_UPDATE 0x4c > +#define PWM_CV1800_OE 0xd0 > +#define PWM_CV1800_HLPERIOD_SHIFT 0x08 > +#define PWM_CV1800_PERIOD_SHIFT 0x08 > + > +#define PWM_CV1800_HLPERIOD(n) \ > + (PWM_CV1800_HLPERIOD_BASE + ((n) * PWM_CV1800_HLPERIOD_SHIFT)) > +#define PWM_CV1800_PERIOD(n) \ > + (PWM_CV1800_PERIOD_BASE + ((n) * PWM_CV1800_PERIOD_SHIFT)) I would have used a plain 0x08 instead of PWM_CV1800_HLPERIOD_SHIFT and PWM_CV1800_PERIOD_SHIFT. > +#define PWM_CV1800_UPDATE_MASK(n) (BIT(0) << (n)) > +#define PWM_CV1800_OE_MASK(n) (BIT(0) << (n)) > +#define PWM_CV1800_START_MASK(n) (BIT(0) << (n)) > + > +#define PWM_CV1800_MAXPERIOD (BIT(30) - 1) > +#define PWM_CV1800_MINPERIOD BIT(1) > +#define PWM_CV1800_MINHLPERIOD BIT(0) > +#define PWM_CV1800_PERIOD_RESET BIT(1) > +#define PWM_CV1800_HLPERIOD_RESET BIT(0) > +#define PWM_CV1800_REG_DISABLE 0x0U > +#define PWM_CV1800_REG_ENABLE(n) (BIT(0) << (n)) > + > +struct cv1800_pwm { > + struct pwm_chip chip; > + struct regmap *map; > + struct clk *clk; > + unsigned long clk_rate; > +}; > + > +static const struct regmap_config cv1800_pwm_regmap_config = { > + .reg_bits = 32, > + .val_bits = 32, > + .reg_stride = 4, > +}; > + > +static inline struct cv1800_pwm *to_cv1800_pwm_dev(struct pwm_chip *chip) > +{ > + return container_of(chip, struct cv1800_pwm, chip); Please rework the driver to use pwmchip_alloc(). See https://lore.kernel.org/linux-pwm/a37a167364366b6cbe2dd299dce02731706213b2.1707900770.git.u.kleine-koenig@xxxxxxxxxxxxxx/T/#u for a simple example for such a rework. > +} > + > +static int cv1800_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm, > + bool enable) > +{ > + struct cv1800_pwm *priv = to_cv1800_pwm_dev(chip); > + u32 pwm_enable; > + > + regmap_read(priv->map, PWM_CV1800_START, &pwm_enable); > + pwm_enable &= PWM_CV1800_START_MASK(pwm->hwpwm); > + > + /* > + * If the parameters are changed during runtime, Register needs > + * to be updated to take effect. > + */ > + if (pwm_enable && enable) { > + regmap_update_bits(priv->map, PWM_CV1800_UPDATE, > + PWM_CV1800_UPDATE_MASK(pwm->hwpwm), > + PWM_CV1800_REG_ENABLE(pwm->hwpwm)); > + regmap_update_bits(priv->map, PWM_CV1800_UPDATE, > + PWM_CV1800_UPDATE_MASK(pwm->hwpwm), > + PWM_CV1800_REG_DISABLE); > + } else if (!pwm_enable && enable) { > + regmap_update_bits(priv->map, PWM_CV1800_OE, > + PWM_CV1800_OE_MASK(pwm->hwpwm), > + PWM_CV1800_REG_ENABLE(pwm->hwpwm)); > + regmap_update_bits(priv->map, PWM_CV1800_START, > + PWM_CV1800_START_MASK(pwm->hwpwm), > + PWM_CV1800_REG_ENABLE(pwm->hwpwm)); > + } else if (pwm_enable && !enable) { > + regmap_update_bits(priv->map, PWM_CV1800_OE, > + PWM_CV1800_OE_MASK(pwm->hwpwm), > + PWM_CV1800_REG_DISABLE); > + regmap_update_bits(priv->map, PWM_CV1800_START, > + PWM_CV1800_START_MASK(pwm->hwpwm), > + PWM_CV1800_REG_DISABLE); > + } > + > + return 0; > +} > + > +static int cv1800_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, > + const struct pwm_state *state) > +{ > + struct cv1800_pwm *priv = to_cv1800_pwm_dev(chip); > + u32 period_val, hlperiod_val; > + u64 tem; > + > + if (state->polarity != PWM_POLARITY_NORMAL) > + return -EINVAL; > + > + tem = mul_u64_u64_div_u64(state->period, priv->clk_rate, NSEC_PER_SEC); > + if (tem > PWM_CV1800_MAXPERIOD || tem < PWM_CV1800_MINPERIOD) > + return -EINVAL; Please use: if (tem < PWM_CV1800_MINPERIOD) return -EINVAL if (tem > PWM_CV1800_MAXPERIOD) tem = PWM_CV1800_MAXPERIOD; > + period_val = (u32)tem; > + > + tem = mul_u64_u64_div_u64(state->period - state->duty_cycle, > + priv->clk_rate, NSEC_PER_SEC); Given that you're supposed to configure the biggest duty_cycle not bigger than the requested value, you have to round up here. Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-König | Industrial Linux Solutions | https://www.pengutronix.de/ |
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