From: Yang Xiwen <forbidden405@xxxxxxxxxxx> This is needed for port1 to work. Fixes: ba8b0ee81fbb ("phy: add inno-usb2-phy driver for hi3798cv200 SoC") Signed-off-by: Yang Xiwen <forbidden405@xxxxxxxxxxx> --- drivers/phy/hisilicon/phy-hisi-inno-usb2.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/phy/hisilicon/phy-hisi-inno-usb2.c b/drivers/phy/hisilicon/phy-hisi-inno-usb2.c index c138cd4807d6..b7e740eb4752 100644 --- a/drivers/phy/hisilicon/phy-hisi-inno-usb2.c +++ b/drivers/phy/hisilicon/phy-hisi-inno-usb2.c @@ -86,8 +86,10 @@ static void hisi_inno_phy_write_reg(struct hisi_inno_phy_priv *priv, static void hisi_inno_phy_setup(struct hisi_inno_phy_priv *priv) { + int i; /* The phy clk is controlled by the port0 register 0x06. */ - hisi_inno_phy_write_reg(priv, 0, 0x06, PHY_CLK_ENABLE); + for (i = 0; i < INNO_PHY_PORT_NUM; i++) + hisi_inno_phy_write_reg(priv, i, 0x06, PHY_CLK_ENABLE); msleep(PHY_CLK_STABLE_TIME); } -- 2.43.0