On Thu, Jan 25, 2024 at 05:46:40PM +0800, AnnanLiu wrote: > Add the watchdog device tree node to cv1800 SoC. > > Signed-off-by: AnnanLiu <annan.liu.xdu@xxxxxxxxxxx> > --- > This patch depends on the clk driver and reset driver. > Clk driver link: > https://lore.kernel.org/all/IA1PR20MB49539CDAD9A268CBF6CA184BBB9FA@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/ > Reset driver link: > https://lore.kernel.org/all/20231113005503.2423-1-jszhang@xxxxxxxxxx/ I will update reset series soon > > Changes since v1: > - Change the name of the watchdog from watchdog0 to watchdog. > - Change the status of watchdog. > v1 link: > https://lore.kernel.org/all/DM6PR20MB23160B8499CC2BFDAE6FCACDAB9EA@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/ > > > arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts | 4 ++++ > arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 16 ++++++++++++++++ > 2 files changed, 20 insertions(+) > > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts > index 3af9e34b3bc7..75469161bfff 100644 > --- a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts > +++ b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts > @@ -36,3 +36,7 @@ &osc { > &uart0 { > status = "okay"; > }; > + > +&watchdog { > + status = "okay"; > +}; > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > index aec6401a467b..03ca32cd37b6 100644 > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > @@ -1,6 +1,7 @@ > // SPDX-License-Identifier: (GPL-2.0 OR MIT) > /* > * Copyright (C) 2023 Jisheng Zhang <jszhang@xxxxxxxxxx> > + * Copyright (C) 2024 Annan Liu <annan.liu.xdu@xxxxxxxxxxx> No, I don't think every commit author needs to add this line. > */ > > #include <dt-bindings/interrupt-controller/irq.h> > @@ -103,6 +104,21 @@ uart4: serial@41c0000 { > status = "disabled"; > }; > > + watchdog: watchdog@3010000{ > + compatible = "snps,dw-wdt"; > + reg = <0x3010000 0x100>; > + interrupts = <58 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&pclk>; > + resets = <&rst RST_WDT>; > + status = "disabled"; > + }; > + > + pclk: pclk { what's this clk? > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <25000000>; > + }; > + > plic: interrupt-controller@70000000 { > compatible = "sophgo,cv1800b-plic", "thead,c900-plic"; > reg = <0x70000000 0x4000000>; > -- > 2.34.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@xxxxxxxxxxxxxxxxxxx > http://lists.infradead.org/mailman/listinfo/linux-riscv
