On 2/17/2024 6:18 PM, Krzysztof Kozlowski wrote:
On 16/02/2024 16:21, Yang Xiwen via B4 Relay wrote:
This should be considered a dirty hack. The proper solution would be
extracting write_reg logic to a separate regmap driver. Leaving only
"write BIT(2) to address 0x6" to the PHY driver.
The initial commit is already doing things wrong. The following patches
adding hi3798mv100 support is also very confusing. The name of the
enumeration "PHY_TYPE_x" is very misleading as if it's the phy which is
different across SoCs. But actually it's the bus (i.e. how to write to a
given address) which is different, not the PHY.
I have many bounces from your emails. Please do not Cc unrelated,
non-working hisilicon emails.
All except one email addresses are added by `b4 prep --auto-to-cc`.
Anyway, i'll remove the email address that does not work in next version.
Best regards,
Krzysztof
--
Regards,
Yang Xiwen
