To be clear, I don't want to add support for the QCA4024, I just want
to use this SoC with its own firmware connected to another SoC
(IPQ8072A) via spi.
On Fri, Feb 16, 2024 at 8:19 AM Krzysztof Kozlowski
<krzysztof.kozlowski@xxxxxxxxxx> wrote:
>
> On 15/02/2024 23:01, frut3k7 wrote:
> > The device I use has the QCA4024 chip connected via the spi controller:
> > blsp1_spi4: spi@78b8000 {
> > compatible = "qcom,spi-qup-v2.2.1";
> > #address-cells = <1>;
> > #size-cells = <0>;
> > reg = <0x78b8000 0x600>;
> > interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
> > clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
> > <&gcc GCC_BLSP1_AHB_CLK>;
> > clock-names = "core", "iface";
> > dmas = <&blsp_dma 18>, <&blsp_dma 19>;
> > dma-names = "tx", "rx";
> > status = "disabled";
> > };
> >
> > and apart from setting the frequency and gpio there is nothing else:
> > &blsp1_spi4 {
> > status = "okay";
> >
> > pinctrl-0 = <&spi_3_pins &quartz_pins>;
> > pinctrl-names = "default";
> >
> > /* Qualcomm QCA4024 IoT */
> > iot@3 {
> > compatible = "qca,qca4024";
> > reg = <0>;
> > spi-max-frequency = <24000000>;
>
> That's your downstream or fork DTS, not hardware description. You could
> have several regulators not listed here, because your downstream has
> always-on, or clocks which are not taken and works due to
> assigned-clocks in other places... Sorry, that's not an argument. Never
> use downstream DTS as proof how hardware looks. It is usually dis-proof,
> that things are certainly missing.
>
> Best regards,
> Krzysztof
>
