On Mon, Feb 12, 2024 at 07:29:11PM +0100, Krzysztof Kozlowski wrote:
> Convert the Qualcomm Atheros AR9331 built-in switch bindings to DT
> schema.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
Reviewed-by: Oleksij Rempel <o.rempel@xxxxxxxxxxxxxx>
Thank you!
> ---
>
> DSA switch bindings still bring me headache...
>
> Changes in v2:
> 1. Narrow pattern for phy children to ethernet-phy@ or phy@ (MIPS DTS
> has the latter) - Conor.
> ---
> .../devicetree/bindings/net/dsa/ar9331.txt | 147 ----------------
> .../bindings/net/dsa/qca,ar9331.yaml | 161 ++++++++++++++++++
> 2 files changed, 161 insertions(+), 147 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/net/dsa/ar9331.txt
> create mode 100644 Documentation/devicetree/bindings/net/dsa/qca,ar9331.yaml
>
> diff --git a/Documentation/devicetree/bindings/net/dsa/ar9331.txt b/Documentation/devicetree/bindings/net/dsa/ar9331.txt
> deleted file mode 100644
> index f824fdae0da2..000000000000
> --- a/Documentation/devicetree/bindings/net/dsa/ar9331.txt
> +++ /dev/null
> @@ -1,147 +0,0 @@
> -Atheros AR9331 built-in switch
> -=============================
> -
> -It is a switch built-in to Atheros AR9331 WiSoC and addressable over internal
> -MDIO bus. All PHYs are built-in as well.
> -
> -Required properties:
> -
> - - compatible: should be: "qca,ar9331-switch"
> - - reg: Address on the MII bus for the switch.
> - - resets : Must contain an entry for each entry in reset-names.
> - - reset-names : Must include the following entries: "switch"
> - - interrupt-parent: Phandle to the parent interrupt controller
> - - interrupts: IRQ line for the switch
> - - interrupt-controller: Indicates the switch is itself an interrupt
> - controller. This is used for the PHY interrupts.
> - - #interrupt-cells: must be 1
> - - mdio: Container of PHY and devices on the switches MDIO bus.
> -
> -See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional
> -required and optional properties.
> -Examples:
> -
> -eth0: ethernet@19000000 {
> - compatible = "qca,ar9330-eth";
> - reg = <0x19000000 0x200>;
> - interrupts = <4>;
> -
> - resets = <&rst 9>, <&rst 22>;
> - reset-names = "mac", "mdio";
> - clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
> - clock-names = "eth", "mdio";
> -
> - phy-mode = "mii";
> - phy-handle = <&phy_port4>;
> -};
> -
> -eth1: ethernet@1a000000 {
> - compatible = "qca,ar9330-eth";
> - reg = <0x1a000000 0x200>;
> - interrupts = <5>;
> - resets = <&rst 13>, <&rst 23>;
> - reset-names = "mac", "mdio";
> - clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
> - clock-names = "eth", "mdio";
> -
> - phy-mode = "gmii";
> -
> - fixed-link {
> - speed = <1000>;
> - full-duplex;
> - };
> -
> - mdio {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - switch10: switch@10 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - compatible = "qca,ar9331-switch";
> - reg = <0x10>;
> - resets = <&rst 8>;
> - reset-names = "switch";
> -
> - interrupt-parent = <&miscintc>;
> - interrupts = <12>;
> -
> - interrupt-controller;
> - #interrupt-cells = <1>;
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - switch_port0: port@0 {
> - reg = <0x0>;
> - ethernet = <ð1>;
> -
> - phy-mode = "gmii";
> -
> - fixed-link {
> - speed = <1000>;
> - full-duplex;
> - };
> - };
> -
> - switch_port1: port@1 {
> - reg = <0x1>;
> - phy-handle = <&phy_port0>;
> - phy-mode = "internal";
> - };
> -
> - switch_port2: port@2 {
> - reg = <0x2>;
> - phy-handle = <&phy_port1>;
> - phy-mode = "internal";
> - };
> -
> - switch_port3: port@3 {
> - reg = <0x3>;
> - phy-handle = <&phy_port2>;
> - phy-mode = "internal";
> - };
> -
> - switch_port4: port@4 {
> - reg = <0x4>;
> - phy-handle = <&phy_port3>;
> - phy-mode = "internal";
> - };
> - };
> -
> - mdio {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - interrupt-parent = <&switch10>;
> -
> - phy_port0: phy@0 {
> - reg = <0x0>;
> - interrupts = <0>;
> - };
> -
> - phy_port1: phy@1 {
> - reg = <0x1>;
> - interrupts = <0>;
> - };
> -
> - phy_port2: phy@2 {
> - reg = <0x2>;
> - interrupts = <0>;
> - };
> -
> - phy_port3: phy@3 {
> - reg = <0x3>;
> - interrupts = <0>;
> - };
> -
> - phy_port4: phy@4 {
> - reg = <0x4>;
> - interrupts = <0>;
> - };
> - };
> - };
> - };
> -};
> diff --git a/Documentation/devicetree/bindings/net/dsa/qca,ar9331.yaml b/Documentation/devicetree/bindings/net/dsa/qca,ar9331.yaml
> new file mode 100644
> index 000000000000..fd9ddc59d38c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/dsa/qca,ar9331.yaml
> @@ -0,0 +1,161 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/dsa/qca,ar9331.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Atheros AR9331 built-in switch
> +
> +maintainers:
> + - Oleksij Rempel <o.rempel@xxxxxxxxxxxxxx>
> +
> +description:
> + Qualcomm Atheros AR9331 is a switch built-in to Atheros AR9331 WiSoC and
> + addressable over internal MDIO bus. All PHYs are built-in as well.
> +
> +properties:
> + compatible:
> + const: qca,ar9331-switch
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + interrupt-controller: true
> +
> + '#interrupt-cells':
> + const: 1
> +
> + mdio:
> + $ref: /schemas/net/mdio.yaml#
> + unevaluatedProperties: false
> + properties:
> + interrupt-parent: true
> +
> + patternProperties:
> + '(ethernet-)?phy@[0-4]+$':
> + type: object
> + unevaluatedProperties: false
> +
> + properties:
> + reg: true
> + interrupts:
> + maxItems: 1
> +
> + resets:
> + maxItems: 1
> +
> + reset-names:
> + items:
> + - const: switch
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - interrupt-controller
> + - '#interrupt-cells'
> + - mdio
> + - ports
> + - resets
> + - reset-names
> +
> +allOf:
> + - $ref: dsa.yaml#/$defs/ethernet-ports
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + switch10: switch@10 {
> + compatible = "qca,ar9331-switch";
> + reg = <0x10>;
> +
> + interrupt-parent = <&miscintc>;
> + interrupts = <12>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> +
> + resets = <&rst 8>;
> + reset-names = "switch";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0x0>;
> + ethernet = <ð1>;
> +
> + phy-mode = "gmii";
> +
> + fixed-link {
> + speed = <1000>;
> + full-duplex;
> + };
> + };
> +
> + port@1 {
> + reg = <0x1>;
> + phy-handle = <&phy_port0>;
> + phy-mode = "internal";
> + };
> +
> + port@2 {
> + reg = <0x2>;
> + phy-handle = <&phy_port1>;
> + phy-mode = "internal";
> + };
> +
> + port@3 {
> + reg = <0x3>;
> + phy-handle = <&phy_port2>;
> + phy-mode = "internal";
> + };
> +
> + port@4 {
> + reg = <0x4>;
> + phy-handle = <&phy_port3>;
> + phy-mode = "internal";
> + };
> + };
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + interrupt-parent = <&switch10>;
> +
> + phy_port0: ethernet-phy@0 {
> + reg = <0x0>;
> + interrupts = <0>;
> + };
> +
> + phy_port1: ethernet-phy@1 {
> + reg = <0x1>;
> + interrupts = <0>;
> + };
> +
> + phy_port2: ethernet-phy@2 {
> + reg = <0x2>;
> + interrupts = <0>;
> + };
> +
> + phy_port3: ethernet-phy@3 {
> + reg = <0x3>;
> + interrupts = <0>;
> + };
> +
> + phy_port4: ethernet-phy@4 {
> + reg = <0x4>;
> + interrupts = <0>;
> + };
> + };
> + };
> + };
> --
> 2.34.1
>
>
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
