Re: [PATCH 6/7] arm64: dts: qcom: sm8550: Mark DWC3 as dma-coherent

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On 12/02/2024 14:10, Konrad Dybcio wrote:
In a fairly new development, Qualcomm somehow made the DWC3 block
cache-coherent. Annotate that.

Fixes: 7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes")
Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
---
  arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 +
  1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 925e56317fb0..e845c8814fb9 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -3207,6 +3207,7 @@ usb_1_dwc3: usb@a600000 {
  				snps,usb2-lpm-disable;
  				snps,has-lpm-erratum;
  				tx-fifo-resize;
+				dma-coherent;
ports {
  					#address-cells = <1>;


Reviewed-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>




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