On 24-01-29 17:11:25, Dmitry Baryshkov wrote: > On Mon, 29 Jan 2024 at 15:19, Abel Vesa <abel.vesa@xxxxxxxxxx> wrote: > > > > Add support for MDSS on X1E80100. > > > > Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx> > > --- > > drivers/gpu/drm/msm/msm_mdss.c | 10 ++++++++++ > > 1 file changed, 10 insertions(+) > > > > diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c > > index 455b2e3a0cdd..eddf7fdbb60a 100644 > > --- a/drivers/gpu/drm/msm/msm_mdss.c > > +++ b/drivers/gpu/drm/msm/msm_mdss.c > > @@ -564,6 +564,15 @@ static const struct msm_mdss_data sdm670_data = { > > .highest_bank_bit = 1, > > }; > > > > +static const struct msm_mdss_data x1e80100_data = { > > + .ubwc_enc_version = UBWC_4_0, > > + .ubwc_dec_version = UBWC_4_3, > > + .ubwc_swizzle = 6, > > + .ubwc_static = 1, > > + .highest_bank_bit = 2, > > + .macrotile_mode = 1, > > Missing .reg_bus_bw, LGTM otherwise Dmitry, I do not have the exact value yet. Can I come back with a subsequent (different) patch to add it at a later stage when I have that information? I see no point in holding display support any further since it works fine with the default bandwith. If yes, I'll respin this series right away, but without the reg_bus_bw. > > > +}; > > + > > static const struct msm_mdss_data sdm845_data = { > > .ubwc_enc_version = UBWC_2_0, > > .ubwc_dec_version = UBWC_2_0, > > @@ -655,6 +664,7 @@ static const struct of_device_id mdss_dt_match[] = { > > { .compatible = "qcom,sm8450-mdss", .data = &sm8350_data }, > > { .compatible = "qcom,sm8550-mdss", .data = &sm8550_data }, > > { .compatible = "qcom,sm8650-mdss", .data = &sm8550_data}, > > + { .compatible = "qcom,x1e80100-mdss", .data = &x1e80100_data}, > > {} > > }; > > MODULE_DEVICE_TABLE(of, mdss_dt_match); > > > > -- > > 2.34.1 > > > > > -- > With best wishes > Dmitry