On 05/02/2024 11:05, MD Danish Anwar wrote: > From: Suman Anna <s-anna@xxxxxx> > > The ICSSG IP on AM64x SoCs have two Industrial Ethernet Peripherals (IEPs) > to manage/generate Industrial Ethernet functions such as time stamping. > Each IEP sub-module is sourced from an internal clock mux that can be > derived from either of the IP instance's ICSSG_IEP_GCLK or from another > internal ICSSG CORE_CLK mux. Add both the IEP nodes for both the ICSSG > instances. The IEP clock is currently configured to be derived > indirectly from the ICSSG_ICLK running at 250 MHz. > > Signed-off-by: Vignesh Raghavendra <vigneshr@xxxxxx> > Signed-off-by: Grygorii Strashko <grygorii.strashko@xxxxxx> > Signed-off-by: Suman Anna <s-anna@xxxxxx> > Signed-off-by: MD Danish Anwar <danishanwar@xxxxxx> > Reviewed-by: Ravi Gunasekaran <r-gunasekaran@xxxxxx> Reviewed-by: Roger Quadros <rogerq@xxxxxxxxxx>