Re: [RESEND PATCH v2] arm64: dts: ti: k3-am69-sk: remove assigned-clock-parents for unused VP

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Hi Jayesh,

Many thanks for the patch.

On Fri, Feb 2, 2024 at 6:17 AM Aradhya Bhatia <a-bhatia1@xxxxxx> wrote:
>
>
>
> On 01-Feb-24 19:53, Jayesh Choudhary wrote:
> > VP2 and VP3 are unused video ports and VP3 share the same parent
> > clock as VP1 causing issue with pixel clock setting for HDMI (VP1).
> > The current DM firmware does not support changing parent clock if it
> > is shared by another component. It returns 0 for the determine_rate
> > query before causing set_rate to set the clock at default maximum of
> > 1.8GHz which is a lot more than the maximum frequency videoports can
> > support (600MHz) causing SYNC LOST issues.
> > So remove the parent clocks for unused VPs to avoid conflict.
> >
> > Fixes: 6f8605fd7d11 ("arm64: dts: ti: k3-am69-sk: Add DP and HDMI support")
> > Reported-by: Nishanth Menon <nm@xxxxxx>
> > Signed-off-by: Jayesh Choudhary <j-choudhary@xxxxxx>
> > Reviewed-by: Tomi Valkeinen <tomi.valkeinen@xxxxxxxxxxxxxxxx>
>
> Reviewed-by: Aradhya Bhatia <a-bhatia1@xxxxxx>
>

This patch fixes the issue I see on my AM69-SK board and after
applying it  the HDMI of the board works again so

Tested-by: Enric Balletbo i Serra <eballetbo@xxxxxxxxxx>

> Regards
> Aradhya
>
> > ---
> >
> > v1: <https://lore.kernel.org/all/20231221113042.48492-1-j-choudhary@xxxxxx/>
> >
> > Changelog v1->v2:
> > - Updated commit message
> > - Picked up Tomi's R-by from v1
> > - Removed "Closes:" link since its invalid now
> >
> > (NOTE: Sending again as forgot to put mailing list in cc earlier)
> >
> >  arch/arm64/boot/dts/ti/k3-am69-sk.dts | 8 ++------
> >  1 file changed, 2 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
> > index 8da591579868..370980eb59b0 100644
> > --- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
> > +++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
> > @@ -918,13 +918,9 @@ &dss {
> >       pinctrl-names = "default";
> >       pinctrl-0 = <&dss_vout0_pins_default>;
> >       assigned-clocks = <&k3_clks 218 2>,
> > -                       <&k3_clks 218 5>,
> > -                       <&k3_clks 218 14>,
> > -                       <&k3_clks 218 18>;
> > +                       <&k3_clks 218 5>;
> >       assigned-clock-parents = <&k3_clks 218 3>,
> > -                              <&k3_clks 218 7>,
> > -                              <&k3_clks 218 16>,
> > -                              <&k3_clks 218 22>;
> > +                              <&k3_clks 218 7>;
> >  };
> >
> >  &serdes_wiz4 {
>






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