On 2/5/24 8:05 AM, Vignesh Raghavendra wrote:
On 31/01/24 01:21, Andrew Davis wrote:
Add TI SERDES control registers compatible. This is a region found in the
TI AM65 CTRL_MMR0 register space[0]. Each instance is used to control a
SERDES clock and lane select mux.
[0] https://www.ti.com/lit/pdf/spruid7
Signed-off-by: Andrew Davis <afd@xxxxxx>
---
Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index 084b5c2a2a3c2..d8679a2ad4b10 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -73,6 +73,7 @@ properties:
- rockchip,rv1126-qos
- starfive,jh7100-sysmain
- ti,am654-dss-oldi-io-ctrl
+ - ti,am654-serdes-ctrl
- const: syscon
This needs to go via mfd tree (or at least need an ACK). Please cc
appropriate maintainer (Lee Jones <lee@xxxxxxxxxx>). So, I recommended
to split 2/2 out into separate series and post once this patch is merged.
Sure, will send this patch standalone, then post the dts changes later.
Andrew
