Update maxItems to 60 for gpio-reserved-ranges to allow multiple gpio reserved ranges. Add input-enable property to allow configuring a pin as input. Update example & fix alignment. Signed-off-by: Naresh Solanki <naresh.solanki@xxxxxxxxxxxxx> --- .../bindings/pinctrl/cypress,cy8c95x0.yaml | 38 ++++++++++++++----- 1 file changed, 28 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml b/Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml index 7f30ec2f1e54..90dda5d3cc55 100644 --- a/Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml +++ b/Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml @@ -45,7 +45,8 @@ properties: maxItems: 1 gpio-reserved-ranges: - maxItems: 1 + minItems: 1 + maxItems: 60 vdd-supply: description: @@ -85,6 +86,8 @@ patternProperties: bias-disable: true + input-enable: true + output-high: true output-low: true @@ -125,14 +128,29 @@ examples: #size-cells = <0>; pinctrl@20 { - compatible = "cypress,cy8c9520"; - reg = <0x20>; - gpio-controller; - #gpio-cells = <2>; - #interrupt-cells = <2>; - interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; - interrupt-controller; - vdd-supply = <&p3v3>; - gpio-reserved-ranges = <5 1>; + compatible = "cypress,cy8c9520"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + vdd-supply = <&p3v3>; + gpio-reserved-ranges = <1 2>, <6 1>, <10 1>, <15 1>; + + pinctrl-0 = <&U62160_pins>, <&U62160_ipins>; + pinctrl-names = "default"; + U62160_pins: cfg-pins { + pins = "gp03", "gp16", "gp20", "gp50", "gp51"; + function = "gpio"; + input-enable; + bias-pull-up; + }; + U62160_ipins: icfg-pins { + pins = "gp04", "gp17", "gp21", "gp52", "gp53"; + function = "gpio"; + input-enable; + bias-pull-up; + }; }; }; base-commit: 861c0981648f5b64c86fd028ee622096eb7af05a -- 2.42.0