This patchset adds every node necessary for both the CRD and QCP to boot with PCIe, USB and embedded DisplayPort. This patchset depends on the Disp CC and TCSR CC bindings: https://lore.kernel.org/all/20240129-x1e80100-clock-controllers-v3-0-d96dacfed104@xxxxxxxxxx/ Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx> --- Changes in v6: - reordered the interrupts for all USB1 SSx controllers to fix some bindings check - added all msi interrupts for both pcie controllers - fixed anoc and cnoc clocks for both pcie controllers - added link down reset to pcie4 - dropped the fallback compatible for all displayport controllers as they are HW-wise incompatible - Link to v5: https://lore.kernel.org/r/20240126-x1e80100-dts-missing-nodes-v5-0-3bb716fb2af9@xxxxxxxxxx Changes in v5: - Added Konrad's R-b tags to patches 1 through 4 and A-b tag to patch 11 - Changed the clock of the usb2 HS PHY to TCSR_USB2_2_CLKREF_EN, the USB1 SSx HS PHY seem to be sharing the TCSR_USB2_1_CLKREF_EN - Prefixed DISP_CC_MDSS_CORE_* gdscs with MDSS_* to be more in line with SM8[56]50 platforms. - Added "cpu-cfg" icc path to the mdss node. - Marked all USB1 SS[1-3] controllers as dma coherent. - Re-worded the adding TCSR node commit message by just dropping the "halt" word as the halt registers are not part of this region. The TCSR offers more than just a clock controller and therefore called it generically "TCSR register space". - Link to v4: https://lore.kernel.org/r/20240123-x1e80100-dts-missing-nodes-v4-0-072dc2f5c153@xxxxxxxxxx Changes in v4: - After a discussion off-list, it was suggested by Bjorn to split in separate patches. - Addressed all of Konrad's comments, except of the clock-names one for the mdss, which there is nothing to be done about as all non-v5 do clk_bulk_get_all. - Added more support to QCP, to be more aligned with CRD (except touchscreen and keyboard) - Added a patch to fix some LDOs supplies on QCP - Link to v3: https://lore.kernel.org/r/20231215-x1e80100-dts-missing-nodes-v3-0-c4e8d186adf2@xxxxxxxxxx Changes in v3: - Reword the commit messages - Link to v2: https://lore.kernel.org/r/20231215-x1e80100-dts-missing-nodes-v2-0-5a6efc04d00c@xxxxxxxxxx Changes in v2: - Reword both commits to make it more clear nodes that are being added - Dropped comments from interrupt maps from pcie nodes - Replace all 0x0 with 0 in all reg properties - Moved on separate lines reg, reset and clock names - Dropped the sram and cpucp nodes - Dropped pmic glink node - Reordered all new clock controller nodes based on address - Dropped unnecessary indent from touchpad and keyboard TLMM nodes - Link to v1: https://lore.kernel.org/r/20231212-x1e80100-dts-missing-nodes-v1-0-1472efec2b08@xxxxxxxxxx --- Abel Vesa (7): arm64: dts: qcom: x1e80100: Add TCSR node arm64: dts: qcom: x1e80100: Add USB nodes arm64: dts: qcom: x1e80100: Add PCIe nodes arm64: dts: qcom: x1e80100: Add display nodes arm64: dts: qcom: x1e80100-crd: Enable more support arm64: dts: qcom: x1e80100-qcp: Enable more support arm64: dts: qcom: x1e80100-qcp: Fix supplies for LDOs 3E and 2J Sibi Sankar (4): arm64: dts: qcom: x1e80100: Add IPCC node arm64: dts: qcom: x1e80100: Add SMP2P nodes arm64: dts: qcom: x1e80100: Add QMP AOSS node arm64: dts: qcom: x1e80100: Add ADSP/CDSP remoteproc nodes arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 222 +++++ arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 175 +++- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 1396 ++++++++++++++++++++++++++++- 3 files changed, 1786 insertions(+), 7 deletions(-) --- base-commit: b5d2c51e6f120c3f06fc8ed5216be7de805b94da change-id: 20231201-x1e80100-dts-missing-nodes-a09f1ed99999 Best regards, -- Abel Vesa <abel.vesa@xxxxxxxxxx>
