Re: [PATCH RFC 1/2] arm64: dts: qcom: msm8953: Add GPU IOMMU

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On 25/01/2024 23:56, Luca Weiss wrote:
From: Vladimir Lypak <vladimir.lypak@xxxxxxxxx>

Add the IOMMU used for the GPU on MSM8953.

Signed-off-by: Vladimir Lypak <vladimir.lypak@xxxxxxxxx>
---
  arch/arm64/boot/dts/qcom/msm8953.dtsi | 31 +++++++++++++++++++++++++++++++
  1 file changed, 31 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index dcb5c98b793c..91d083871ab0 100644
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -1046,6 +1046,37 @@ mdss_dsi1_phy: phy@1a96400 {
  			};
  		};
+ gpu_iommu: iommu@1c48000 {

Nit: most of the platforms use the adreno_smmu label. But maybe the msm-iommu vs arm-smmu makes difference here.

Nevertheless:

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>

+			compatible = "qcom,msm8953-iommu", "qcom,msm-iommu-v2";
+			ranges = <0 0x01c48000 0x8000>;
+
+			clocks = <&gcc GCC_OXILI_AHB_CLK>,
+				 <&gcc GCC_BIMC_GFX_CLK>;
+			clock-names = "iface", "bus";
+
+			power-domains = <&gcc OXILI_CX_GDSC>;
+
+			qcom,iommu-secure-id = <18>;
+
+			#address-cells = <1>;
+			#iommu-cells = <1>;
+			#size-cells = <1>;
+
+			/* gfx3d_user */
+			iommu-ctx@0 {
+				compatible = "qcom,msm-iommu-v2-ns";
+				reg = <0x0000 0x1000>;
+				interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+			};
+
+			/* gfx3d_secure */
+			iommu-ctx@2000 {
+				compatible = "qcom,msm-iommu-v2-sec";
+				reg = <0x2000 0x1000>;
+				interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
+			};
+		};
+
  		apps_iommu: iommu@1e20000 {
  			compatible = "qcom,msm8953-iommu", "qcom,msm-iommu-v1";
  			ranges = <0 0x01e20000 0x20000>;


--
With best wishes
Dmitry





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