On Thu, Jan 25, 2024 at 05:46:23PM +0800, AnnanLiu wrote: > Add the timer device tree node to CV1800 SoC. > > Signed-off-by: AnnanLiu <annan.liu.xdu@xxxxxxxxxxx> > --- > This patch depends on the clk driver and reset driver. > Clk driver link: > https://lore.kernel.org/all/IA1PR20MB49539CDAD9A268CBF6CA184BBB9FA@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/ > Reset driver link: > https://lore.kernel.org/all/20231113005503.2423-1-jszhang@xxxxxxxxxx/ > > Changes since v1: > - Change the status of the timer from disabled to okay. > v1 link: > https://lore.kernel.org/all/DM6PR20MB23167E08FCA546D6C1899CB1AB9EA@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/ > > arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 73 +++++++++++++++++++++++++ > 1 file changed, 73 insertions(+) > > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > index aec6401a467b..aef7970af2b8 100644 > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > @@ -1,6 +1,7 @@ > // SPDX-License-Identifier: (GPL-2.0 OR MIT) > /* > * Copyright (C) 2023 Jisheng Zhang <jszhang@xxxxxxxxxx> > + * Copyright (C) 2024 Annan Liu <annan.liu.xdu@xxxxxxxxxxx> > */ > > #include <dt-bindings/interrupt-controller/irq.h> > @@ -113,6 +114,78 @@ plic: interrupt-controller@70000000 { > riscv,ndev = <101>; > }; > > + timer0: timer@030a0000 { > + compatible = "snps,dw-apb-timer"; > + reg = <0x030a0000 0x14>; > + interrupts = <79 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&osc>; > + resets = <&rst RST_TIMER0>; > + status = "okay"; Do these really have no interface clock? I'd expect something that is almost certainly sitting on a apb (or similar) interface to have one. Thanks, Conor.
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