Re: [PATCH 4/7] dt-bindings: dma: allwinner,sun50i-a64-dma: Add compatible for H616

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On Thu, Jan 25, 2024 at 11:09 PM Andre Przywara <andre.przywara@xxxxxxx> wrote:
>
> On Thu, 25 Jan 2024 22:37:34 +0800
> Chen-Yu Tsai <wens@xxxxxxxxxx> wrote:
>
> Hi,
>
> > On Tue, Jan 23, 2024 at 8:41 AM Andre Przywara <andre.przywara@xxxxxxx> wrote:
> > >
> > > On Tue, 23 Jan 2024 01:05:15 +0800
> > > Chen-Yu Tsai <wens@xxxxxxxxxx> wrote:
> > >
> > > Hi,
> > >
> > > > From: Chen-Yu Tsai <wens@xxxxxxxx>
> > > >
> > > > The DMA controllers found on the H616 and H618 are the same as the one
> > > > found on the H6. The only difference is the DMA endpoint (DRQ) layout.
> > >
> > > That does not seem to be entirely true: The H616 encodes the two lowest
> > > bits in DMA_DESC_ADDR_REG differently: on the H6 they must be 0 (word
> > > aligned), on the H616 these contain bits [33:32] of the address of the
> > > DMA descriptor. The manual doesn't describe the descriptor format in
> > > much detail, but ec31c5c59492 suggests that those two bits are put in
> > > the "para" word of the descriptor.
> >
> > Good catch. So, same as the A100 I believe?
>
> Yes, that's what I got as well.
>
> > > The good thing it that this encoding is backwards compatible, so I
> > > think the fallback string still holds: Any driver just implementing the
> > > H6 encoding would be able to drive the H616.
> > >
> > > I think the A100 was mis-described, as mentioned here:
> > > https://lore.kernel.org/linux-arm-kernel/29e575b6-14cb-73f1-512d-9f0f934490ea@xxxxxxx/
> > > I think we should:
> > > - make the A100 use: "allwinner,sun50i-a100-dma", "sun50i-h6-dma"
> > > - make the H616 use: "allwinner,sun50i-h616-dma", "allwinner,sun50i-a100-dma", "sun50i-h6-dma"
> > >
> > > Does that make sense?
> >
> > I wouldn't call that exactly backward compatible. Say the driver forgot to
> > clear the two bits. It would work fine on the H6, but the accessed address
> > could be way off on the A100 and H616.
>
> I don't know the exact boundaries of "compatible" here, but the H6 manual
> pretty clearly states "The descriptor address must be word-aligned."
> But since the A100 compatible is known and supported for a while, that
> doesn't really matter, practically speaking, I guess.

I'd say that makes the descriptor address register backward compatible,

> One could check how the H6 DMA controller reacts to those bits not being
> 0, not sure if I find the time, though.

but no idea about the parameter field in the descriptor. So for now I
think we should just be cautious. Since as you mentioned the A100 is already
supported and listed separately, lets just keep that for now.

ChenYu

[...]





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