On 24-01-23 19:20:38, Konrad Dybcio wrote: > > > On 1/23/24 12:01, Abel Vesa wrote: > > Add nodes for PCIe 4 and 6 controllers and their PHYs for X1E80100 platform. > > > > Co-developed-by: Sibi Sankar <quic_sibis@xxxxxxxxxxx> > > Signed-off-by: Sibi Sankar <quic_sibis@xxxxxxxxxxx> > > Co-developed-by: Rajendra Nayak <quic_rjendra@xxxxxxxxxxx> > > Signed-off-by: Rajendra Nayak <quic_rjendra@xxxxxxxxxxx> > > Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx> > > --- > > [...] > > > + > > + interrupts = <GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH>; > > + interrupt-names = "msi"; > > You may want to add ITS MSIs too That will be added after we figure out the mapping. > > [...] > > > + > > + resets = <&gcc GCC_PCIE_6A_BCR>, > > + <&gcc GCC_PCIE_6A_LINK_DOWN_BCR>; > > The second entry is misaligned > > Konrad
