On Wed, 24 Jan 2024 11:25:54 +0100 Fabian Pfitzner wrote: > The ADIN1300 offers three distinct output clocks which can be accessed > through the GP_CLK pin. The DT only offers two of the possible options > and thus the 125MHz-recovered output clock is missing. > > As there is no other way to configure this pin than through the DT it > should be possible to do so for all available outputs. Hi Fabian! If you want to use PHY-recovered clock you should really use the DPLL subsystem. It will also allow you to configure other PHYs taking this signal as an input, to forward the clock phase. Read lock state. Etc. Even if the patches are good (which I'm not saying they are yet ;)) - you'll have to repost this as a new thread, unfortunately. I'm not sure why by the way this was posted made patchwork think that the patches are separate series: https://patchwork.kernel.org/project/netdevbpf/list/?series=819440 https://patchwork.kernel.org/project/netdevbpf/list/?series=818548 each of which is incomplete, since it only has one patch but subject says "1/2" and "2/2".
