On Wed, Jan 24, 2024 at 11:23:05PM +0100, Andrew Lunn wrote: > > + clock-frequency: > > + description: > > + The MDIO bus clock that must be output by the MDIO bus hardware, if > > + absent, the default hardware values are used. > > + > > + MDC rate is feed by an external clock (fixed 100MHz) and is divider > > + internally. The default divider is /256 resulting in the default rate > > + applied of 390KHz. > > + enum: [ 390625, 781250, 1562500, 3125000, 6250000, 12500000 ] > > Hi Christian > > 802.3 says the clock should be up to 2.5MHz by default. So the nearest > would be 1562500. Please document that if not set, it defaults to > this. And make the driver actually default to that. > As I said, this is very fk up and default value is 390KHz unless anyone in the chain sets it (sometime uboot does it but it's not that common... default qsdk uboot doesn't do that for example)... Ok I have to change this to default to 1562500. -- Ansuel
