The LDOs 3E and 2J are actually supplied by SMPS 5J. Fix accordingly.
Fixes: af16b00578a7 ("arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts")
Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
index 8dbf6d0eaac3..e76d29053d79 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
@@ -261,7 +261,7 @@ regulators-3 {
qcom,pmic-id = "e";
vdd-l2-supply = <&vreg_s1f_0p7>;
- vdd-l3-supply = <&vph_pwr>;
+ vdd-l3-supply = <&vreg_s5j_1p2>;
vreg_l2e_0p8: ldo2 {
regulator-name = "vreg_l2e_0p8";
@@ -367,7 +367,7 @@ regulators-7 {
qcom,pmic-id = "j";
vdd-l1-supply = <&vreg_s1f_0p7>;
- vdd-l2-supply = <&vph_pwr>;
+ vdd-l2-supply = <&vreg_s5j_1p2>;
vdd-l3-supply = <&vreg_s1f_0p7>;
vdd-s5-supply = <&vph_pwr>;
--
2.34.1
