Hi Hector,
thanks for the patch.
Am Montag, 15. Januar 2024, 14:16:05 CET schrieb Hector Palacios:
> According to NXP HRM for i.MX93, the following GPIO pins are available:
> - GPIO1: 16 pins (0..15)
Mh, RM Rev4 (12/2023) says:
> Bit[31:17] should be Reserved for GPIO1
So GPIO1 has the range 0..16
> - GPIO2: 30 pins (0..29)
> - GPIO3: 32 pins (0..31)
> - GPIO4: 30 pins (0..29)
RM Rev4 (12/2023) says:
> Bit[31:28] should be Reserved for GPIO4
So GPIO4 would be the range 0..27
Where did you get your numbers from?
Best regards,
Alexander
>
> Signed-off-by: Hector Palacios <hector.palacios@xxxxxxxx>
> ---
> arch/arm64/boot/dts/freescale/imx93.dtsi | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi
> b/arch/arm64/boot/dts/freescale/imx93.dtsi index 34c0540276d1..7eb2cab7c749
> 100644
> --- a/arch/arm64/boot/dts/freescale/imx93.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
> @@ -970,6 +970,7 @@ gpio2: gpio@43810000 {
> <&clk IMX93_CLK_GPIO2_GATE>;
> clock-names = "gpio", "port";
> gpio-ranges = <&iomuxc 0 4 30>;
> + ngpios = <30>;
> };
>
> gpio3: gpio@43820000 {
> @@ -986,6 +987,7 @@ gpio3: gpio@43820000 {
> clock-names = "gpio", "port";
> gpio-ranges = <&iomuxc 0 84 8>, <&iomuxc 8 66
18>,
> <&iomuxc 26 34 2>, <&iomuxc 28 0
4>;
> + ngpios = <32>;
> };
>
> gpio4: gpio@43830000 {
> @@ -1001,6 +1003,7 @@ gpio4: gpio@43830000 {
> <&clk IMX93_CLK_GPIO4_GATE>;
> clock-names = "gpio", "port";
> gpio-ranges = <&iomuxc 0 38 28>, <&iomuxc 28 36
2>;
> + ngpios = <30>;
> };
>
> gpio1: gpio@47400000 {
> @@ -1016,6 +1019,7 @@ gpio1: gpio@47400000 {
> <&clk IMX93_CLK_GPIO1_GATE>;
> clock-names = "gpio", "port";
> gpio-ranges = <&iomuxc 0 92 16>;
> + ngpios = <16>;
> };
>
> ocotp: efuse@47510000 {
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