Document the ISA string for T-Head performance monitor extension
which provides counter overflow interrupt mechanism.
Signed-off-by: Yu Chien Peter Lin <peterlin@xxxxxxxxxxxxx>
Reviewed-by: Guo Ren <guoren@xxxxxxxxxx>
Reviewed-by: Inochi Amaoto <inochiama@xxxxxxxxxxx>
Acked-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
---
Changes v2 -> v3:
- New patch
Changes v3 -> v4:
- No change
Changes v4 -> v5:
- Include Guo's Reviewed-by
- Include Inochi's Reviewed-by
- Update to C910 documentation with its commit hash
Changes v5 -> v6:
- Include Conor's Acked-by
Changes v6 -> v7:
- No change
---
Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index 27beedb98198..ee0747f29d6d 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -477,5 +477,11 @@ properties:
latency, as ratified in commit 56ed795 ("Update
riscv-crypto-spec-vector.adoc") of riscv-crypto.
+ - const: xtheadpmu
+ description:
+ The T-Head performance monitor extension for counter overflow, as ratified
+ in commit 4c4981 ("Initial commit") of Xuantie C910 user manual.
+ https://github.com/T-head-Semi/openc910/tree/main/doc
+
additionalProperties: true
...
--
2.34.1
