Hi Yoshinori, thanks for your patch! On Tue, Jan 9, 2024 at 9:24 AM Yoshinori Sato <ysato@xxxxxxxxxxxxxxxxxxxx> wrote: > Renesas SH7751 PCI Controller json-schema. > > Signed-off-by: Yoshinori Sato <ysato@xxxxxxxxxxxxxxxxxxxx> (...) > + renesas,bus-arbit-round-robin: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + Set DMA bus arbitration to round robin. > + > + pci-command-reg-fast-back-to-back: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + Set for PCI command register Fast Back-to-Back enable bit. > + > + pci-command-reg-serr: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + Set for PCI command register SERR# enable. > + > + pci-command-reg-wait-cycle-control: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + Set for PCI command register Wait cycle control bit. > + > + pci-command-reg-parity-error-response: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + Set for PCI Command register Parity error response bit. > + > + pci-command-reg-vga-snoop: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + Set for PCI Command register VGA palette snoop bit. > + > + pci-command-reg-write-invalidate: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + Set for PCI Command register Memory write and invaldate enable bit. > + > + pci-command-reg-special-cycle: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + Set for PCI Command register Special cycle bit. > + > + pci-command-reg-bus-master: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + Set for PCI Command register Bus master bit. > + > + pci-command-reg-memory-space: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + Set for PCI Command register Memory space bit. > + > + pci-command-reg-io-space: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + Set for PCI Command register I/O space bit. Do you really need to configure all these things? It seems they are just set to default values anyway? Can't you just look at the compatible "renesas,sh7751-pci" and set it to the values you know are needed for that compatible? > + pci-bar: > + $ref: /schemas/types.yaml#/definitions/uint32-matrix > + description: Overwrite to PCI CONFIG Base Address Registers value. > + items: > + items: > + - description: BAR register number > + - description: BAR register value > + minItems: 1 > + maxItems: 6 Same with this, isn't this always the same (hardcoded) values for "renesas,sh7751-pci" if used? > + interrupt-map = <0x0000 0 0 1 &julianintc 5>, > + <0x0000 0 0 2 &julianintc 6>, > + <0x0000 0 0 3 &julianintc 7>, > + <0x0000 0 0 4 &julianintc 8>, > + <0x0800 0 0 1 &julianintc 6>, > + <0x0800 0 0 2 &julianintc 7>, > + <0x0800 0 0 3 &julianintc 8>, > + <0x0800 0 0 4 &julianintc 5>, > + <0x1000 0 0 1 &julianintc 7>, > + <0x1000 0 0 2 &julianintc 8>, > + <0x1000 0 0 3 &julianintc 5>, > + <0x1000 0 0 4 &julianintc 6>; This interrupt-map looks very strange, usually the last cell is the polarity flag and here it is omitted? I would expect something like: <0x0000 0 0 1 &julianintc 5 IRQ_TYPE_LEVEL_LOW>, (...) The interrupt-map schema in dtschema isn't really looking at this so it is easy to get it wrong. Yours, Linus Walleij
