A nuvoton,*-clk-rst node is present in nuvoton-common-npcm7xx.dtsi and will be added to nuvoton-common-npcm8xx.dtsi. It is necessary for the NPCM7xx and NPCM8xx clock and reset drivers, and may later be used to retrieve SoC model and version information. This patch adds a binding to describe this node. Signed-off-by: Tomer Maimon <tmaimon77@xxxxxxxxx> --- .../soc/nuvoton/nuvoton,npcm-clk-rst.yaml | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/nuvoton/nuvoton,npcm-clk-rst.yaml diff --git a/Documentation/devicetree/bindings/soc/nuvoton/nuvoton,npcm-clk-rst.yaml b/Documentation/devicetree/bindings/soc/nuvoton/nuvoton,npcm-clk-rst.yaml new file mode 100644 index 000000000000..dfec64a8eb26 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/nuvoton/nuvoton,npcm-clk-rst.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/nuvoton/nuvoton,npcm-clk-rst.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Clock and reset registers block in Nuvoton SoCs + +maintainers: + - Tomer Maimon <tmaimon77@xxxxxxxxx> + +description: + The clock and reset registers are a registers block in Nuvoton SoCs that + handle both reset and clock functionality. + +properties: + compatible: + items: + - enum: + - nuvoton,npcm750-clk-rst + - nuvoton,npcm845-clk-rst + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: + type: object + +examples: + - | + clk_rst: syscon@801000 { + compatible = "nuvoton,npcm750-clk-rst", "syscon", "simple-mfd"; + reg = <0x801000 0x6C>; + }; -- 2.34.1
