Quoting Daniel Golle (2023-12-17 13:50:15) > From: Sam Shih <sam.shih@xxxxxxxxxxxx> > > Add APMIXED, ETH, INFRACFG and TOPCKGEN clock drivers which are > typical MediaTek designs. > > Also add driver for XFIPLL clock generating the 156.25MHz clock for > the XFI SerDes. It needs an undocumented software workaround and has > an unknown internal design. > > Signed-off-by: Sam Shih <sam.shih@xxxxxxxxxxxx> > Signed-off-by: Daniel Golle <daniel@xxxxxxxxxxxxxx> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx> > --- Applied to clk-next
