On 31/12/2023 15:48, Luca Weiss wrote:
> Convert the .txt documentation to .yaml.
>
> Take the liberty to change the compatibles for ipq8064, apq8064, msm8974
> and msm8960 to follow the updated naming schema. These compatibles are
> not used upstream yet.
>
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - qcom,apq8064-hfpll
> + - qcom,ipq8064-hfpll
> + - qcom,msm8960-hfpll
> + - qcom,msm8974-hfpll
> + - qcom,msm8976-hfpll-a53
> + - qcom,msm8976-hfpll-a72
> + - qcom,msm8976-hfpll-cci
> + - qcom,qcs404-hfpll
> + - const: qcom,hfpll
> +
> + reg:
> + items:
> + - description: Base address and size of the register region
HPLL registers
> + - description: Optional base address and size of the alias register region
Alias register region
> + minItems: 1
> +
> + '#clock-cells':
> + const: 0
> +
> + clocks:
> + items:
> + - description: board XO clock
> +
> + clock-names:
> + items:
> + - const: xo
> +
> + clock-output-names:
> + description:
> + Name of the PLL. Typically hfpllX where X is a CPU number starting at 0.
> + Otherwise hfpll_Y where Y is more specific such as "l2".
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - '#clock-cells'
> + - clocks
> + - clock-names
> + - clock-output-names
> +
> +additionalProperties: false
> +
> +examples:
> + # Example 1 - HFPLL for L2 cache
> + - |
> + clock-controller@f9016000 {
> + compatible = "qcom,ipq8064-hfpll", "qcom,hfpll";
> + reg = <0xf9016000 0x30>;
> + clocks = <&xo_board>;
> + clock-names = "xo";
> + clock-output-names = "hfpll_l2";
> + #clock-cells = <0>;
> + };
> + # Example 2 - HFPLL for CPU0
Just keep one example, they are the same. And then drop the comment.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
Best regards,
Krzysztof
