Qualcomm targets define the following interrupts for usb wakeup:
{dp/dm}_hs_phy_irq, hs_phy_irq, pwr_event, ss_phy_irq.
But QUSB2 Phy based targets have another interrupt which gets triggered
in response to J/K states on dp/dm pads. Its functionality is replaced
by dp/dm interrupts on Femto/m31/eusb2 phy based targets for wakeup
purposes. Exceptions are some targets like SDM845/SDM670/SM6350 where
dp/dm irq's are used although they are qusb2 phy targets.
Currently in QUSB2 Phy based DT's, te qusb2_phy interrupt is named and
used as "hs_phy_irq" when in fact it is a different interrupt (used by
HW validation folks for debug purposes and not used on any downstream
target qusb/non-qusb).
On some non-QUSB2 targets (like sm8450/sm8550), the pwr_event IRQ was
named as hs_phy_irq and actual pwr_event_irq was skipped.
This series tries to address the discrepancies in the interrupt numbering
adding the missing interrupts and correcting the existing ones.
This series has been compared with downstream counter part and hw specifics
to ensure the numbering is right. Since there is not functionality change
the code has been only compile tested.
Changes in v5:
Fixed commit header on v4-1 bindings patch.
Provide lore link instead of patchwork link for v3.
Changes in v4:
Udpated commit text indicating why pwr_event interrupt was added as the first
one and fixed some typos present in v3.
While at it, rebase on top of latest linux-next fixing merge conflicts.
Changes in v3:
Separated out the DT changes and pushed only bindings and driver update.
Modified order of irq descriptions to match them with permutations defined.
Fixed nitpicks mentioned by reviewers in v2.
Changes in v2:
Removed additional compatibles added for different targets in v1.
Specified permuations of interrupts possible for QC targets and regrouped
interrupts for most of the DT's.
Link to v4:
https://lore.kernel.org/all/20231222062720.10128-1-quic_kriskura@xxxxxxxxxxx/
Link to v3:
https://lore.kernel.org/all/20231211121124.4194-1-quic_kriskura@xxxxxxxxxxx/
Link to v2:
https://lore.kernel.org/all/20231204100950.28712-1-quic_kriskura@xxxxxxxxxxx/
Link to v1: (providing patchwork link since threading was broken in v1)
https://patchwork.kernel.org/project/linux-arm-msm/cover/20231122191259.3021-1-quic_kriskura@xxxxxxxxxxx/
Krishna Kurapati (2):
The high speed related interrupts present on QC targets are as
follows:
usb: dwc3: qcom: Rename hs_phy_irq to qusb2_phy_irq
.../devicetree/bindings/usb/qcom,dwc3.yaml | 138 ++++++++----------
drivers/usb/dwc3/dwc3-qcom.c | 22 +--
2 files changed, 70 insertions(+), 90 deletions(-)
--
2.42.0
