On 20/12/2023 11:00, Michal Simek wrote: > + gpio: > + $ref: /schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml# > + description: The gpio node describes connect to PS_MODE pins via firmware > + interface. > + type: object > + > + pcap: > + $ref: /schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml > + description: The ZynqMP SoC uses the PCAP (Processor Configuration Port) to > + configure the Programmable Logic (PL). The configuration uses the > + firmware interface. > + type: object > + > + pinctrl: > + $ref: /schemas/pinctrl/xlnx,zynqmp-pinctrl.yaml# > + description: The pinctrl node provides access to pinconfig and pincontrol > + functionality available in firmware. > + type: object > + > + power-controller: > + $ref: /schemas/power/reset/xlnx,zynqmp-power.yaml# This should be "power-controller" only if it is a power domain provider. Is it? Bot's report suggest it is not, therefore I suggested power-management. Also, please extend the example. The top-level example for complex devices should be complete. Apologies for not bringing it earlier. Best regards, Krzysztof
