On Thu, Dec 14, 2023 at 9:05 AM Elad Nachman <enachman@xxxxxxxxxxx> wrote: > > From: Elad Nachman <enachman@xxxxxxxxxxx> > > Add support for Marvell ac5/x variant of the ARM > sbsa global watchdog. This watchdog deviates from > the standard driver by the following items: > > 1. Registers reside in secure register section. > hence access is only possible via SMC calls to ATF. > > 2. There are couple more registers which reside in > other register areas, which needs to be configured > in order for the watchdog to properly generate > reset through the SOC. > > The new Marvell compatibility string differentiates between > the original sbsa mode of operation and the Marvell mode of > operation. > > Signed-off-by: Elad Nachman <enachman@xxxxxxxxxxx> > --- > drivers/watchdog/sbsa_gwdt.c | 247 ++++++++++++++++++++++++++++++++--- > 1 file changed, 226 insertions(+), 21 deletions(-) > > diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c > index 5f23913ce3b4..0bc6f53f0968 100644 > --- a/drivers/watchdog/sbsa_gwdt.c > +++ b/drivers/watchdog/sbsa_gwdt.c > @@ -46,10 +46,13 @@ > #include <linux/mod_devicetable.h> > #include <linux/module.h> > #include <linux/moduleparam.h> > +#include <linux/of.h> > +#include <linux/of_device.h> > #include <linux/platform_device.h> > #include <linux/uaccess.h> > #include <linux/watchdog.h> > #include <asm/arch_timer.h> > +#include <linux/arm-smccc.h> > > #define DRV_NAME "sbsa-gwdt" > #define WATCHDOG_NAME "SBSA Generic Watchdog" > @@ -75,6 +78,68 @@ > #define SBSA_GWDT_VERSION_MASK 0xF > #define SBSA_GWDT_VERSION_SHIFT 16 > > +/* Marvell AC5/X SMCs, taken from arm trusted firmware */ > +#define SMC_FID_READ_REG 0x80007FFE > +#define SMC_FID_WRITE_REG 0x80007FFD One more thing, these IDs are part of the Arm arch range and can't be used. You should be using the SIP range AIUI. Perhaps you should look at arm_smc_wdt.c and make that work on your system. Despite the name, my understanding is it is a ChromeOS defined watchdog, not an Arm (Ltd) one. Rob
