On Sat, 16 Dec 2023 17:26:34 +0100, Alex Bee wrote: > As per TRM this controller supports pixelclocks starting from 25 MHz. The > maximum supported pixelclocks are defined by the phy configurations we > have. Also it can't support modes that require doubled clocks. If the > variant has a phy reference clock we can additionally validate against VESA > DMT'srecommendations. > > [ ... ] Reviewed-by: Maxime Ripard <mripard@xxxxxxxxxx> Thanks! Maxime
